| Message ID | 1541488109-19959-2-git-send-email-smasetty@codeaurora.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | Andy Gross |
| Headers | show |
| Series | [1/2] drm/msm/a6xx: Build a6xx_gpu_state under the right conditionals | expand |
On Tue, Nov 06, 2018 at 12:38:29PM +0530, Sharat Masetty wrote: > This patch simply fixes a typo for the name of an indexed register. > CP_MEMPOOOL -> CP_MEMPOOL. > > Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Reviewed by: Jordan Crouse <jcrouse@codeaurora.org> > --- > drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h > index 68cccfa..bbbec8d 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h > @@ -370,7 +370,7 @@ struct a6xx_registers { > }; > > static const struct a6xx_indexed_registers a6xx_cp_mempool_indexed = { > - "CP_MEMPOOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR, > + "CP_MEMPOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR, > REG_A6XX_CP_MEM_POOL_DBG_DATA, 0x2060, > }; > > -- > 1.9.1 >
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h index 68cccfa..bbbec8d 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h @@ -370,7 +370,7 @@ struct a6xx_registers { }; static const struct a6xx_indexed_registers a6xx_cp_mempool_indexed = { - "CP_MEMPOOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR, + "CP_MEMPOOL", REG_A6XX_CP_MEM_POOL_DBG_ADDR, REG_A6XX_CP_MEM_POOL_DBG_DATA, 0x2060, };
This patch simply fixes a typo for the name of an indexed register. CP_MEMPOOOL -> CP_MEMPOOL. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> --- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)