From patchwork Wed Feb 6 23:24:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeykumar Sankaran X-Patchwork-Id: 10800273 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B4AD1805 for ; Wed, 6 Feb 2019 23:24:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 628152D4B2 for ; Wed, 6 Feb 2019 23:24:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 56C232D4E6; Wed, 6 Feb 2019 23:24:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8A0F02D4B2 for ; Wed, 6 Feb 2019 23:24:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726161AbfBFXY5 (ORCPT ); Wed, 6 Feb 2019 18:24:57 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:60238 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726188AbfBFXY4 (ORCPT ); Wed, 6 Feb 2019 18:24:56 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 5F250608CE; Wed, 6 Feb 2019 23:24:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1549495495; bh=MIjNe7b/OipEb6cUnLf0E9BMzWYqgSgoK0zxOFjtBeg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l2U+IOXfEDiIMHfjDbcIHOw3AjRMXI+bMrKbj4Y70bXE4l05ZaCLki2ALRj8515qn bK3aszY1K28DcVKJp4KoI938XPvQxQWvS9ArdKmw9I+1ZGNbYo290Ngg3PzCr2t/+k xI5CKYgoU0Uh++F6iIx8EQaz2Gv8n1QVBefb+Gy0= Received: from jeykumar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: jsanka@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8D7E260208; Wed, 6 Feb 2019 23:24:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1549495493; bh=MIjNe7b/OipEb6cUnLf0E9BMzWYqgSgoK0zxOFjtBeg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MM4W7BhtGycDv8QJrqr0jP+rasTWl7isiOc7Pe5FGeAnJV9UV/g84NwSUxkaHhxQl 0Bkn7azxjPbwpMB5Ap5lUdM46w45oJkjvQvosE12dnizpKLxq5vKIXfVgAGinRN3XJ dLXEDaPOendjYGDEEiLVf3gB4njh8jYn0rxbwOss= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8D7E260208 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=jsanka@codeaurora.org From: Jeykumar Sankaran To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Cc: Jeykumar Sankaran , seanpaul@chromium.org, robdclark@gmail.com, hoegsberg@google.com Subject: [PATCH 2/2] drm/msm/dpu: remove phys_vid subclass Date: Wed, 6 Feb 2019 15:24:47 -0800 Message-Id: <1549495487-15501-2-git-send-email-jsanka@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1549495487-15501-1-git-send-email-jsanka@codeaurora.org> References: <1549495487-15501-1-git-send-email-jsanka@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Not holding any video encoder specific data. Get rid of it. Signed-off-by: Jeykumar Sankaran --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 11 ----------- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 18 ++++-------------- 2 files changed, 4 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index acd5956..9b1efd9 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -254,17 +254,6 @@ static inline int dpu_encoder_phys_inc_pending(struct dpu_encoder_phys *phys) } /** - * struct dpu_encoder_phys_vid - sub-class of dpu_encoder_phys to handle video - * mode specific operations - * @base: Baseclass physical encoder structure - * @timing_params: Current timing parameter - */ -struct dpu_encoder_phys_vid { - struct dpu_encoder_phys base; - struct intf_timing_params timing_params; -}; - -/** * struct dpu_encoder_phys_cmd - sub-class of dpu_encoder_phys to handle command * mode specific operations * @base: Baseclass physical encoder structure diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index e326395..ce65521 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -240,7 +240,6 @@ static bool dpu_encoder_phys_vid_mode_fixup( static void dpu_encoder_phys_vid_setup_timing_engine( struct dpu_encoder_phys *phys_enc) { - struct dpu_encoder_phys_vid *vid_enc; struct drm_display_mode mode; struct intf_timing_params timing_params = { 0 }; const struct dpu_format *fmt = NULL; @@ -254,7 +253,6 @@ static void dpu_encoder_phys_vid_setup_timing_engine( } mode = phys_enc->cached_mode; - vid_enc = to_dpu_encoder_phys_vid(phys_enc); if (!phys_enc->hw_intf->ops.setup_timing_gen) { DPU_ERROR("timing engine setup is not supported\n"); return; @@ -293,8 +291,6 @@ static void dpu_encoder_phys_vid_setup_timing_engine( spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); programmable_fetch_config(phys_enc, &timing_params); - - vid_enc->timing_params = timing_params; } static void dpu_encoder_phys_vid_vblank_irq(void *arg, int irq_idx) @@ -515,16 +511,13 @@ static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc) static void dpu_encoder_phys_vid_destroy(struct dpu_encoder_phys *phys_enc) { - struct dpu_encoder_phys_vid *vid_enc; - if (!phys_enc) { DPU_ERROR("invalid encoder\n"); return; } - vid_enc = to_dpu_encoder_phys_vid(phys_enc); DPU_DEBUG_VIDENC(phys_enc, "\n"); - kfree(vid_enc); + kfree(phys_enc); } static void dpu_encoder_phys_vid_get_hw_resources( @@ -747,7 +740,6 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init( struct dpu_enc_phys_init_params *p) { struct dpu_encoder_phys *phys_enc = NULL; - struct dpu_encoder_phys_vid *vid_enc = NULL; struct dpu_encoder_irq *irq; int i, ret = 0; @@ -756,14 +748,12 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init( goto fail; } - vid_enc = kzalloc(sizeof(*vid_enc), GFP_KERNEL); - if (!vid_enc) { + phys_enc = kzalloc(sizeof(*phys_enc), GFP_KERNEL); + if (!phys_enc) { ret = -ENOMEM; goto fail; } - phys_enc = &vid_enc->base; - phys_enc->hw_mdptop = p->dpu_kms->hw_mdp; phys_enc->intf_idx = p->intf_idx; @@ -807,7 +797,7 @@ struct dpu_encoder_phys *dpu_encoder_phys_vid_init( fail: DPU_ERROR("failed to create encoder\n"); - if (vid_enc) + if (phys_enc) dpu_encoder_phys_vid_destroy(phys_enc); return ERR_PTR(ret);