| Message ID | 1585810370-6099-3-git-send-email-mkrishn@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/3] drm/msm/dpu: add support for clk and bw scaling for display | expand |
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index ea1b0cd..31fed6d 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -1521,6 +1521,9 @@ interrupt-controller; #interrupt-cells = <1>; + interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>; + interconnect-names = "mdp0-mem"; + iommus = <&apps_smmu 0x800 0x2>; #address-cells = <2>;
This change adds the interconnect bindings to the MDSS node. This will establish Display to DDR path for bus bandwidth voting. Changes in v2: - Change in commit message Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 3 +++ 1 file changed, 3 insertions(+)