diff mbox series

[v7,3/3] arm64: dts: msm8916: Add CCI node

Message ID 1586248382-9058-3-git-send-email-loic.poulain@linaro.org (mailing list archive)
State New, archived
Headers show
Series [v7,1/3] i2c: Add Qualcomm CCI I2C driver | expand

Commit Message

Loic Poulain April 7, 2020, 8:33 a.m. UTC 
The msm8916 CCI controller provides one CCI/I2C bus.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
 v2: add this patch in the series
 v3: add only cci node for now
 v4: no change
 v5: add cci label
 v6: no change
 v7: no change

 arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

Comments

Carl-Daniel Hailfinger May 22, 2020, 4:10 p.m. UTC | #1 
Hi Loic,

it seems that this patch was not picked up in any tree. Do you think
sending it to linux-devicetree would help?

Regards,
Carl-Daniel

> The msm8916 CCI controller provides one CCI/I2C bus.
>
> Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxx>
> Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> ---
>  v2: add this patch in the series
>  v3: add only cci node for now
>  v4: no change
>  v5: add cci label
>  v6: no change
>  v7: no change
>
>  arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
Bjorn Andersson May 22, 2020, 4:57 p.m. UTC | #2 
On Fri 22 May 09:10 PDT 2020, Carl-Daniel Hailfinger wrote:

> Hi Loic,
> 
> it seems that this patch was not picked up in any tree. Do you think
> sending it to linux-devicetree would help?
> 

Afaict it's part of [1] and as such is part of the qcom pull request for
v5.8-rc1.

Please let me know if I'm mistaken and I'll pick it up.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git/log/?h=arm64-for-5.8

Regards,
Bjorn

> Regards,
> Carl-Daniel
> 
> > The msm8916 CCI controller provides one CCI/I2C bus.
> >
> > Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxx>
> > Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx>
> > Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
> > ---
> >  v2: add this patch in the series
> >  v3: add only cci node for now
> >  v4: no change
> >  v5: add cci label
> >  v6: no change
> >  v7: no change
> >
> >  arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
> >  1 file changed, 27 insertions(+)
Carl-Daniel Hailfinger May 22, 2020, 9:46 p.m. UTC | #3 
On 22.05.20 18:57, Bjorn Andersson wrote:
> On Fri 22 May 09:10 PDT 2020, Carl-Daniel Hailfinger wrote:
>
>> Hi Loic,
>>
>> it seems that this patch was not picked up in any tree. Do you think
>> sending it to linux-devicetree would help?
>>
> Afaict it's part of [1] and as such is part of the qcom pull request for
> v5.8-rc1.
>
> Please let me know if I'm mistaken and I'll pick it up.
>
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git/log/?h=arm64-for-5.8

Indeed, you're right. My apologies.

Regards,
Carl-Daniel

>
> Regards,
> Bjorn
>
>> Regards,
>> Carl-Daniel
>>
>>> The msm8916 CCI controller provides one CCI/I2C bus.
>>>
>>> Signed-off-by: Loic Poulain <loic.poulain@xxxxxxxxxx>
>>> Reviewed-by: Robert Foss <robert.foss@xxxxxxxxxx>
>>> Reviewed-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
>>> ---
>>>  v2: add this patch in the series
>>>  v3: add only cci node for now
>>>  v4: no change
>>>  v5: add cci label
>>>  v6: no change
>>>  v7: no change
>>>
>>>  arch/arm64/boot/dts/qcom/msm8916.dtsi | 27 +++++++++++++++++++++++++++
>>>  1 file changed, 27 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 1ced09a..756cc2f 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -1479,6 +1479,33 @@ 
 			};
 		};
 
+		cci: cci@1b0c000 {
+			compatible = "qcom,msm8916-cci";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x1b0c000 0x1000>;
+			interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
+				<&gcc GCC_CAMSS_CCI_AHB_CLK>,
+				<&gcc GCC_CAMSS_CCI_CLK>,
+				<&gcc GCC_CAMSS_AHB_CLK>;
+			clock-names = "camss_top_ahb", "cci_ahb",
+				      "cci", "camss_ahb";
+			assigned-clocks = <&gcc GCC_CAMSS_CCI_AHB_CLK>,
+					  <&gcc GCC_CAMSS_CCI_CLK>;
+			assigned-clock-rates = <80000000>, <19200000>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&cci0_default>;
+			status = "disabled";
+
+			i2c-bus@0 {
+				reg = <0>;
+				clock-frequency = <400000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
 		camss: camss@1b00000 {
 			compatible = "qcom,msm8916-camss";
 			reg = <0x1b0ac00 0x200>,