| Message ID | 1624564058-24095-9-git-send-email-sibis@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add Modem support on SC7280 SoCs | expand |
On Fri, Jun 25, 2021 at 01:17:37AM +0530, Sibi Sankar wrote: > This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs. > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 3fb6a6ef39f8..56ea172f641f 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -584,6 +584,46 @@ > #power-domain-cells = <1>; > }; > > + remoteproc_mpss: remoteproc@4080000 { > + compatible = "qcom,sc7280-mpss-pas"; > + reg = <0 0x04080000 0 0x10000>; > + > + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, looks like this patch/series depends on "Enable miscellaneous hardware blocks to boot WPSS" (https://patchwork.kernel.org/project/linux-arm-msm/list/?series=475089) which is not mentioned. > + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "wdog", "fatal", "ready", "handover", > + "stop-ack", "shutdown-ack"; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "xo"; > + > + power-domains = <&rpmhpd SC7280_CX>, > + <&rpmhpd SC7280_MSS>; > + power-domain-names = "cx", "mss"; > + > + memory-region = <&mpss_mem>; > + > + qcom,qmp = <&aoss_qmp>; > + > + qcom,smem-states = <&modem_smp2p_out 0>; > + qcom,smem-state-names = "stop"; > + > + status = "disabled"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + mboxes = <&ipcc IPCC_CLIENT_MPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP>; > + label = "modem"; > + qcom,remote-pid = <1>; > + }; > + }; > + > stm@6002000 { > compatible = "arm,coresight-stm", "arm,primecell"; > reg = <0 0x06002000 0 0x1000>, Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
On 2021-06-29 00:09, Matthias Kaehlcke wrote: > On Fri, Jun 25, 2021 at 01:17:37AM +0530, Sibi Sankar wrote: >> This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs. >> >> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> >> --- >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 >> ++++++++++++++++++++++++++++++++++++ >> 1 file changed, 40 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> index 3fb6a6ef39f8..56ea172f641f 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> @@ -584,6 +584,46 @@ >> #power-domain-cells = <1>; >> }; >> >> + remoteproc_mpss: remoteproc@4080000 { >> + compatible = "qcom,sc7280-mpss-pas"; >> + reg = <0 0x04080000 0 0x10000>; >> + >> + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, >> + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, > > looks like this patch/series depends on "Enable miscellaneous hardware > blocks to boot WPSS" > (https://patchwork.kernel.org/project/linux-arm-msm/list/?series=475089) > which is not mentioned. ^^ is already in lnext so didn't mention it. > >> + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, >> + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, >> + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, >> + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; >> + interrupt-names = "wdog", "fatal", "ready", "handover", >> + "stop-ack", "shutdown-ack"; >> + >> + clocks = <&rpmhcc RPMH_CXO_CLK>; >> + clock-names = "xo"; >> + >> + power-domains = <&rpmhpd SC7280_CX>, >> + <&rpmhpd SC7280_MSS>; >> + power-domain-names = "cx", "mss"; >> + >> + memory-region = <&mpss_mem>; >> + >> + qcom,qmp = <&aoss_qmp>; >> + >> + qcom,smem-states = <&modem_smp2p_out 0>; >> + qcom,smem-state-names = "stop"; >> + >> + status = "disabled"; >> + >> + glink-edge { >> + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS >> + IPCC_MPROC_SIGNAL_GLINK_QMP >> + IRQ_TYPE_EDGE_RISING>; >> + mboxes = <&ipcc IPCC_CLIENT_MPSS >> + IPCC_MPROC_SIGNAL_GLINK_QMP>; >> + label = "modem"; >> + qcom,remote-pid = <1>; >> + }; >> + }; >> + >> stm@6002000 { >> compatible = "arm,coresight-stm", "arm,primecell"; >> reg = <0 0x06002000 0 0x1000>, > > Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
On Thu 24 Jun 14:47 CDT 2021, Sibi Sankar wrote: > This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs. > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 3fb6a6ef39f8..56ea172f641f 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -584,6 +584,46 @@ > #power-domain-cells = <1>; > }; > > + remoteproc_mpss: remoteproc@4080000 { > + compatible = "qcom,sc7280-mpss-pas"; > + reg = <0 0x04080000 0 0x10000>; > + > + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, > + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "wdog", "fatal", "ready", "handover", > + "stop-ack", "shutdown-ack"; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "xo"; > + > + power-domains = <&rpmhpd SC7280_CX>, > + <&rpmhpd SC7280_MSS>; > + power-domain-names = "cx", "mss"; > + > + memory-region = <&mpss_mem>; > + > + qcom,qmp = <&aoss_qmp>; > + > + qcom,smem-states = <&modem_smp2p_out 0>; > + qcom,smem-state-names = "stop"; > + > + status = "disabled"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + mboxes = <&ipcc IPCC_CLIENT_MPSS > + IPCC_MPROC_SIGNAL_GLINK_QMP>; > + label = "modem"; > + qcom,remote-pid = <1>; > + }; > + }; > + > stm@6002000 { > compatible = "arm,coresight-stm", "arm,primecell"; > reg = <0 0x06002000 0 0x1000>, > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 3fb6a6ef39f8..56ea172f641f 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -584,6 +584,46 @@ #power-domain-cells = <1>; }; + remoteproc_mpss: remoteproc@4080000 { + compatible = "qcom,sc7280-mpss-pas"; + reg = <0 0x04080000 0 0x10000>; + + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + power-domains = <&rpmhpd SC7280_CX>, + <&rpmhpd SC7280_MSS>; + power-domain-names = "cx", "mss"; + + memory-region = <&mpss_mem>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_MPSS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + label = "modem"; + qcom,remote-pid = <1>; + }; + }; + stm@6002000 { compatible = "arm,coresight-stm", "arm,primecell"; reg = <0 0x06002000 0 0x1000>,
This patch adds Q6V5 MSS PAS remoteproc node for SC7280 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 40 ++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)