From patchwork Thu Sep 8 21:18:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuogee Hsieh X-Patchwork-Id: 12970670 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 976E2C54EE9 for ; Thu, 8 Sep 2022 21:19:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229582AbiIHVTD (ORCPT ); Thu, 8 Sep 2022 17:19:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229864AbiIHVTB (ORCPT ); Thu, 8 Sep 2022 17:19:01 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A39305926C; Thu, 8 Sep 2022 14:19:00 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 288JthSW031187; Thu, 8 Sep 2022 21:18:54 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=72sdqr73NnwRqeKtiV3GcKUb48kBdTuBKpEsa7DdC98=; b=pLzWjL5f2M0P3kzyK0tUpAvJ3AHqa0rZ6jZwz2nAykOtT6Gl1EIjmnNjX1cGN9zQ7qsL cFj7Z3PjElpIw1aAMkm4fNJih+wuLJTiJxXScVegR/Pmyp7Dtd30HwQYpH5nmwQD2jOp PweAaZAoAS7s14hDetkhoYhOlqHcdr/26qdkWzsdURTZvX3s9yn/PrEtELm2JwAoxLJI DlvVDOqpqjfGaj4GOMFmsSntyjaA6UMYQ1eRiyLnHEJZaZ+l0t52hOQLUfvTcz7JsC39 gR5gY/30Edqzfc7zaZqj6yy5ytJbDy4ARq5E6mXYQAtMVFVKHeTQdyizLKrYMo8idKTE CQ== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jfcpbt9kf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Sep 2022 21:18:54 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 288LIrcK000637 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 8 Sep 2022 21:18:53 GMT Received: from khsieh-linux1.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 8 Sep 2022 14:18:53 -0700 From: Kuogee Hsieh To: , , , , , , , , , , CC: Kuogee Hsieh , , , , , Subject: [PATCH v4 2/2] drm/msm/dp: retry 3 times if set sink to D0 poweer state failed Date: Thu, 8 Sep 2022 14:18:37 -0700 Message-ID: <1662671917-17194-3-git-send-email-quic_khsieh@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1662671917-17194-1-git-send-email-quic_khsieh@quicinc.com> References: <1662671917-17194-1-git-send-email-quic_khsieh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: hzMCRlBOotSmcQLdrUwSIYqjV3iC_7u0 X-Proofpoint-GUID: hzMCRlBOotSmcQLdrUwSIYqjV3iC_7u0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-08_12,2022-09-08_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 clxscore=1015 bulkscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 mlxscore=0 impostorscore=0 spamscore=0 priorityscore=1501 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209080076 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Bring sink out of D3 (power down) mode into D0 (normal operation) mode by setting DP_SET_POWER_D0 bit to DP_SET_POWER dpcd register. This patch will retry 3 times if written to DP_SET_POWER register failed. Changes in v4: -- split into two patches Signed-off-by: Kuogee Hsieh --- drivers/gpu/drm/msm/dp/dp_link.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_link.c index 36f0af0..7b5ecf5 100644 --- a/drivers/gpu/drm/msm/dp/dp_link.c +++ b/drivers/gpu/drm/msm/dp/dp_link.c @@ -49,23 +49,26 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux, struct dp_link_info *link) { u8 value; - int err; + ssize_t len; + int i; if (link->revision < 0x11) return 0; - err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); - if (err < 0) - return err; + len = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); + if (len < 0) + return len; value &= ~DP_SET_POWER_MASK; value |= DP_SET_POWER_D0; - err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); - if (err < 0) - return err; - - usleep_range(1000, 2000); + /* retry for 1ms to give the sink time to wake up */ + for (i = 0; i < 3; i++) { + len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); + usleep_range(1000, 2000); + if (len == 1) + break; + } return 0; }