| Message ID | 1690433470-24102-1-git-send-email-quic_rohiagar@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dt-bindings: qcom: Update RPMHPD entries for some SoCs | expand |
On Thu, Jul 27, 2023 at 10:21:10AM +0530, Rohit Agarwal wrote: > Update the RPMHPD references with new bindings defined in rpmhpd.h > for Qualcomm SoCs SM8[2345]50. > > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > --- > Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 3 ++- > Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml | 7 ++++--- > Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 5 +++-- > Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 7 ++++--- > Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 7 ++++--- > Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml | 3 ++- > Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 ++- > Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 5 +++-- > 18 files changed, 44 insertions(+), 26 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > index d6774db..d6b81c0 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > @@ -83,6 +83,7 @@ examples: > - | > #include <dt-bindings/clock/qcom,rpmh.h> > #include <dt-bindings/power/qcom-rpmpd.h> > + #include <dt-bindings/power/qcom,rpmhpd.h> > clock-controller@af00000 { > compatible = "qcom,sm8250-dispcc"; > reg = <0x0af00000 0x10000>; > @@ -103,7 +104,7 @@ examples: > #clock-cells = <1>; > #reset-cells = <1>; > #power-domain-cells = <1>; > - power-domains = <&rpmhpd SM8250_MMCX>; > + power-domains = <&rpmhpd RPMHPD_MMCX>; > required-opps = <&rpmhpd_opp_low_svs>; > }; > ... Does this file still need to include old header? The same is applicable to some of the other files in the patch also. We also discussed on the other thread [1] to move the regulator level definitions to new header. should this change be done after that, so that we don't end up touching the very same files again? [1] https://lore.kernel.org/all/a4zztrn6jhblozdswba7psqtvjt5l765mfr3yl4llsm5gsyqef@7x6q7yabydvm/
On Thu, 27 Jul 2023 10:21:10 +0530, Rohit Agarwal wrote: > Update the RPMHPD references with new bindings defined in rpmhpd.h > for Qualcomm SoCs SM8[2345]50. > > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > --- > Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml | 3 ++- > Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 3 ++- > Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml | 7 ++++--- > Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 5 +++-- > Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 7 ++++--- > Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml | 3 ++- > .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 7 ++++--- > Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml | 3 ++- > Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 ++- > Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 5 +++-- > 18 files changed, 44 insertions(+), 26 deletions(-) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.example.dts:22:18: fatal error: dt-bindings/power/qcom,rpmhpd.h: No such file or directory 22 | #include <dt-bindings/power/qcom,rpmhpd.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[2]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.example.dtb] Error 1 make[2]: *** Waiting for unfinished jobs.... make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1500: dt_binding_check] Error 2 make: *** [Makefile:234: __sub-make] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/1690433470-24102-1-git-send-email-quic_rohiagar@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 7/27/2023 11:06 AM, Pavan Kondeti wrote: > On Thu, Jul 27, 2023 at 10:21:10AM +0530, Rohit Agarwal wrote: >> Update the RPMHPD references with new bindings defined in rpmhpd.h >> for Qualcomm SoCs SM8[2345]50. >> >> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >> --- >> Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 3 ++- >> Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 3 ++- >> Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 3 ++- >> Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml | 3 ++- >> Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 3 ++- >> Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml | 3 ++- >> Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 3 ++- >> Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml | 3 ++- >> .../devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml | 7 ++++--- >> Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml | 3 ++- >> .../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 5 +++-- >> Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml | 3 ++- >> .../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 7 ++++--- >> Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml | 3 ++- >> .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 7 ++++--- >> Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml | 3 ++- >> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 ++- >> Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 5 +++-- >> 18 files changed, 44 insertions(+), 26 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml >> index d6774db..d6b81c0 100644 >> --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml >> +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml >> @@ -83,6 +83,7 @@ examples: >> - | >> #include <dt-bindings/clock/qcom,rpmh.h> >> #include <dt-bindings/power/qcom-rpmpd.h> >> + #include <dt-bindings/power/qcom,rpmhpd.h> >> clock-controller@af00000 { >> compatible = "qcom,sm8250-dispcc"; >> reg = <0x0af00000 0x10000>; >> @@ -103,7 +104,7 @@ examples: >> #clock-cells = <1>; >> #reset-cells = <1>; >> #power-domain-cells = <1>; >> - power-domains = <&rpmhpd SM8250_MMCX>; >> + power-domains = <&rpmhpd RPMHPD_MMCX>; >> required-opps = <&rpmhpd_opp_low_svs>; >> }; >> ... > Does this file still need to include old header? The same is applicable > to some of the other files in the patch also. > > We also discussed on the other thread [1] to move the regulator level > definitions to new header. should this change be done after that, so that > we don't end up touching the very same files again? > > [1] > https://lore.kernel.org/all/a4zztrn6jhblozdswba7psqtvjt5l765mfr3yl4llsm5gsyqef@7x6q7yabydvm/ Removing this header directly would also be fine as we are not using any macro defined directly in these bindings. I already checked with dt_binding_check by removing this header. Thanks, Rohit.
On Thu, Jul 27, 2023 at 12:24:10PM +0530, Rohit Agarwal wrote: > > On 7/27/2023 11:06 AM, Pavan Kondeti wrote: > > On Thu, Jul 27, 2023 at 10:21:10AM +0530, Rohit Agarwal wrote: > > > Update the RPMHPD references with new bindings defined in rpmhpd.h > > > for Qualcomm SoCs SM8[2345]50. > > > > > > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> > > > --- > > > Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 3 ++- > > > Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 3 ++- > > > Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 3 ++- > > > Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml | 3 ++- > > > Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 3 ++- > > > Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml | 3 ++- > > > Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 3 ++- > > > Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml | 3 ++- > > > .../devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml | 7 ++++--- > > > Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml | 3 ++- > > > .../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 5 +++-- > > > Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml | 3 ++- > > > .../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 7 ++++--- > > > Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml | 3 ++- > > > .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 7 ++++--- > > > Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml | 3 ++- > > > Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 ++- > > > Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 5 +++-- > > > 18 files changed, 44 insertions(+), 26 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > > > index d6774db..d6b81c0 100644 > > > --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > > > +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > > > @@ -83,6 +83,7 @@ examples: > > > - | > > > #include <dt-bindings/clock/qcom,rpmh.h> > > > #include <dt-bindings/power/qcom-rpmpd.h> > > > + #include <dt-bindings/power/qcom,rpmhpd.h> > > > clock-controller@af00000 { > > > compatible = "qcom,sm8250-dispcc"; > > > reg = <0x0af00000 0x10000>; > > > @@ -103,7 +104,7 @@ examples: > > > #clock-cells = <1>; > > > #reset-cells = <1>; > > > #power-domain-cells = <1>; > > > - power-domains = <&rpmhpd SM8250_MMCX>; > > > + power-domains = <&rpmhpd RPMHPD_MMCX>; > > > required-opps = <&rpmhpd_opp_low_svs>; > > > }; > > > ... > > Does this file still need to include old header? The same is applicable > > to some of the other files in the patch also. > > > > We also discussed on the other thread [1] to move the regulator level > > definitions to new header. should this change be done after that, so that > > we don't end up touching the very same files again? > > > > [1] > > https://lore.kernel.org/all/a4zztrn6jhblozdswba7psqtvjt5l765mfr3yl4llsm5gsyqef@7x6q7yabydvm/ > Removing this header directly would also be fine as we are not using any > macro defined directly in these > bindings. > I already checked with dt_binding_check by removing this header. > Thanks for checking, then we should remove the old header in this patch it self, right? Thanks, Pavan
On 7/27/2023 12:38 PM, Pavan Kondeti wrote: > On Thu, Jul 27, 2023 at 12:24:10PM +0530, Rohit Agarwal wrote: >> On 7/27/2023 11:06 AM, Pavan Kondeti wrote: >>> On Thu, Jul 27, 2023 at 10:21:10AM +0530, Rohit Agarwal wrote: >>>> Update the RPMHPD references with new bindings defined in rpmhpd.h >>>> for Qualcomm SoCs SM8[2345]50. >>>> >>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> >>>> --- >>>> Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 3 ++- >>>> Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 3 ++- >>>> Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 3 ++- >>>> Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml | 3 ++- >>>> Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 3 ++- >>>> Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml | 3 ++- >>>> Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 3 ++- >>>> Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml | 3 ++- >>>> .../devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml | 7 ++++--- >>>> Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml | 3 ++- >>>> .../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 5 +++-- >>>> Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml | 3 ++- >>>> .../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 7 ++++--- >>>> Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml | 3 ++- >>>> .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 7 ++++--- >>>> Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml | 3 ++- >>>> Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 ++- >>>> Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 5 +++-- >>>> 18 files changed, 44 insertions(+), 26 deletions(-) >>>> >>>> diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml >>>> index d6774db..d6b81c0 100644 >>>> --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml >>>> +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml >>>> @@ -83,6 +83,7 @@ examples: >>>> - | >>>> #include <dt-bindings/clock/qcom,rpmh.h> >>>> #include <dt-bindings/power/qcom-rpmpd.h> >>>> + #include <dt-bindings/power/qcom,rpmhpd.h> >>>> clock-controller@af00000 { >>>> compatible = "qcom,sm8250-dispcc"; >>>> reg = <0x0af00000 0x10000>; >>>> @@ -103,7 +104,7 @@ examples: >>>> #clock-cells = <1>; >>>> #reset-cells = <1>; >>>> #power-domain-cells = <1>; >>>> - power-domains = <&rpmhpd SM8250_MMCX>; >>>> + power-domains = <&rpmhpd RPMHPD_MMCX>; >>>> required-opps = <&rpmhpd_opp_low_svs>; >>>> }; >>>> ... >>> Does this file still need to include old header? The same is applicable >>> to some of the other files in the patch also. >>> >>> We also discussed on the other thread [1] to move the regulator level >>> definitions to new header. should this change be done after that, so that >>> we don't end up touching the very same files again? >>> >>> [1] >>> https://lore.kernel.org/all/a4zztrn6jhblozdswba7psqtvjt5l765mfr3yl4llsm5gsyqef@7x6q7yabydvm/ >> Removing this header directly would also be fine as we are not using any >> macro defined directly in these >> bindings. >> I already checked with dt_binding_check by removing this header. >> > Thanks for checking, then we should remove the old header in this patch > it self, right? Yes Thanks, Rohit. > > Thanks, > Pavan
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml index d6774db..d6b81c0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -83,6 +83,7 @@ examples: - | #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> clock-controller@af00000 { compatible = "qcom,sm8250-dispcc"; reg = <0x0af00000 0x10000>; @@ -103,7 +104,7 @@ examples: #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - power-domains = <&rpmhpd SM8250_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; required-opps = <&rpmhpd_opp_low_svs>; }; ... diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml index 23505c8..1ea13eb 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml @@ -52,6 +52,7 @@ examples: - | #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> clock-controller@abf0000 { compatible = "qcom,sm8350-videocc"; @@ -59,7 +60,7 @@ examples: clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>; - power-domains = <&rpmhpd SM8350_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; required-opps = <&rpmhpd_opp_low_svs>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml index 87ae741..f795132 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml @@ -65,6 +65,7 @@ examples: #include <dt-bindings/clock/qcom,gcc-sm8450.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> clock-controller@ade0000 { compatible = "qcom,sm8450-camcc"; reg = <0xade0000 0x20000>; @@ -72,7 +73,7 @@ examples: <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>; - power-domains = <&rpmhpd SM8450_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; required-opps = <&rpmhpd_opp_low_svs>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml index 1dd1f69..007464a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml @@ -77,6 +77,7 @@ examples: #include <dt-bindings/clock/qcom,gcc-sm8450.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> clock-controller@af00000 { compatible = "qcom,sm8450-dispcc"; reg = <0x0af00000 0x10000>; @@ -91,7 +92,7 @@ examples: #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - power-domains = <&rpmhpd SM8450_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; required-opps = <&rpmhpd_opp_low_svs>; }; ... diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml index f1c6dd5..8e79767 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml @@ -65,12 +65,13 @@ examples: #include <dt-bindings/clock/qcom,gcc-sm8450.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> videocc: clock-controller@aaf0000 { compatible = "qcom,sm8450-videocc"; reg = <0x0aaf0000 0x10000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_VIDEO_AHB_CLK>; - power-domains = <&rpmhpd SM8450_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; required-opps = <&rpmhpd_opp_low_svs>; #clock-cells = <1>; #reset-cells = <1>; diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml index ab25f7c..fe2fba6 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml @@ -77,6 +77,7 @@ examples: #include <dt-bindings/clock/qcom,sm8550-gcc.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> clock-controller@af00000 { compatible = "qcom,sm8550-dispcc"; reg = <0x0af00000 0x10000>; @@ -99,7 +100,7 @@ examples: #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - power-domains = <&rpmhpd SM8550_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; required-opps = <&rpmhpd_opp_low_svs>; }; ... diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index 2b07146..269d253 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -125,6 +125,7 @@ examples: - | #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> clock-controller@ab00000 { compatible = "qcom,sdm845-videocc"; reg = <0x0ab00000 0x10000>; @@ -133,7 +134,7 @@ examples: #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; - power-domains = <&rpmhpd SM8250_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; required-opps = <&rpmhpd_opp_low_svs>; }; ... diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml index 687c8c1..0bee237 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml @@ -55,6 +55,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,sm8250.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-controller@ae01000 { compatible = "qcom,sm8250-dpu"; @@ -72,7 +73,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8250_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml index 368d3db..b6ad904 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml @@ -77,6 +77,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,sm8250.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-subsystem@ae00000 { compatible = "qcom,sm8250-mdss"; @@ -121,7 +122,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8250_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; @@ -196,7 +197,7 @@ examples: assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SM8250_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; phys = <&dsi0_phy>; phy-names = "dsi"; @@ -286,7 +287,7 @@ examples: assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SM8250_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; phys = <&dsi1_phy>; phy-names = "dsi"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml index 1205003..717e43e 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml @@ -52,6 +52,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,sm8350.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-controller@ae01000 { compatible = "qcom,sm8350-dpu"; @@ -76,7 +77,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8350_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml index 79a226e..361b727 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml @@ -76,6 +76,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,sm8350.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-subsystem@ae00000 { compatible = "qcom,sm8350-mdss"; @@ -128,7 +129,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8350_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; @@ -197,7 +198,7 @@ examples: <&mdss_dsi0_phy 1>; operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SM8350_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; phys = <&mdss_dsi0_phy>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml index 0d17ece..c2ebf0cc 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml @@ -59,6 +59,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,sm8450.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-controller@ae01000 { compatible = "qcom,sm8450-dpu"; @@ -83,7 +84,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8450_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml index f26eb56..3007563 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml @@ -69,6 +69,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,sm8450.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-subsystem@ae00000 { compatible = "qcom,sm8450-mdss"; @@ -122,7 +123,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8450_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; @@ -202,7 +203,7 @@ examples: assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SM8450_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; phys = <&dsi0_phy>; phy-names = "dsi"; @@ -297,7 +298,7 @@ examples: assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SM8450_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; phys = <&dsi1_phy>; phy-names = "dsi"; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml index ff58a74..bbde68f 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml @@ -58,6 +58,7 @@ examples: #include <dt-bindings/clock/qcom,sm8550-gcc.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-controller@ae01000 { compatible = "qcom,sm8550-dpu"; @@ -82,7 +83,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8550_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml index 887be33..b501af9 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml @@ -69,6 +69,7 @@ examples: #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interconnect/qcom,sm8550-rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> display-subsystem@ae00000 { compatible = "qcom,sm8550-mdss"; @@ -122,7 +123,7 @@ examples: assigned-clock-rates = <19200000>; operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd SM8550_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; interrupt-parent = <&mdss>; interrupts = <0>; @@ -197,7 +198,7 @@ examples: assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>; operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SM8550_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; phys = <&dsi0_phy>; phy-names = "dsi"; @@ -286,7 +287,7 @@ examples: assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>; operating-points-v2 = <&dsi_opp_table>; - power-domains = <&rpmhpd SM8550_MMCX>; + power-domains = <&rpmhpd RPMHPD_MMCX>; phys = <&dsi1_phy>; phy-names = "dsi"; diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml index 7915dcd..cd3215a 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml @@ -107,6 +107,7 @@ examples: #include <dt-bindings/interconnect/qcom,sm8250.h> #include <dt-bindings/clock/qcom,gcc-sm8250.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> venus: video-codec@aa00000 { compatible = "qcom,sm8250-venus"; @@ -114,7 +115,7 @@ examples: interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&videocc MVS0C_GDSC>, <&videocc MVS0_GDSC>, - <&rpmhpd SM8250_MX>; + <&rpmhpd RPMHPD_MX>; power-domain-names = "venus", "vcodec0", "mx"; clocks = <&gcc GCC_VIDEO_AXI0_CLK>, diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml index 6da28e6..146e273 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml @@ -216,6 +216,7 @@ examples: #include <dt-bindings/clock/qcom,gcc-sm8250.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> sdhc_2: mmc@8804000 { compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; @@ -232,7 +233,7 @@ examples: iommus = <&apps_smmu 0x4a0 0x0>; qcom,dll-config = <0x0007642c>; qcom,ddr-config = <0x80040868>; - power-domains = <&rpmhpd SM8250_CX>; + power-domains = <&rpmhpd RPMHPD_CX>; operating-points-v2 = <&sdhc2_opp_table>; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml index af24f9a..06cad42 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml @@ -140,6 +140,7 @@ examples: #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/power/qcom-rpmpd.h> + #include <dt-bindings/power/qcom,rpmhpd.h> remoteproc@30000000 { compatible = "qcom,sm8450-adsp-pas"; @@ -160,8 +161,8 @@ examples: memory-region = <&adsp_mem>; - power-domains = <&rpmhpd SM8450_LCX>, - <&rpmhpd SM8450_LMX>; + power-domains = <&rpmhpd RPMHPD_LCX>, + <&rpmhpd RPMHPD_LMX>; power-domain-names = "lcx", "lmx"; qcom,qmp = <&aoss_qmp>;
Update the RPMHPD references with new bindings defined in rpmhpd.h for Qualcomm SoCs SM8[2345]50. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> --- Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 3 ++- Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 3 ++- Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml | 3 ++- Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml | 3 ++- Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml | 3 ++- Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml | 3 ++- Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 3 ++- Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml | 3 ++- .../devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml | 7 ++++--- Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml | 3 ++- .../devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml | 5 +++-- Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml | 3 ++- .../devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 7 ++++--- Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml | 3 ++- .../devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml | 7 ++++--- Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml | 3 ++- Documentation/devicetree/bindings/mmc/sdhci-msm.yaml | 3 ++- Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 5 +++-- 18 files changed, 44 insertions(+), 26 deletions(-)