From patchwork Mon Aug 7 13:38:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 13344265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A067C001DB for ; Mon, 7 Aug 2023 13:39:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234294AbjHGNjo (ORCPT ); Mon, 7 Aug 2023 09:39:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54804 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234241AbjHGNjc (ORCPT ); Mon, 7 Aug 2023 09:39:32 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4255EE54; Mon, 7 Aug 2023 06:39:29 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 377AsOTQ010048; Mon, 7 Aug 2023 13:39:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references; s=qcppdkim1; bh=W16oT+2sW04dm/jRfSyh1arwi1EC0iZRt6B548ghO1k=; b=o1DiyFQU3UlbZBqKpKPlI/ESl3NSVin9UObhSomdqFKhLwvI/+krjJMOBPYTxg9cBGU4 MZBQv1tVL/VqHyOEvMzSwml/tuniODw3Nzwyk9HhT1rW/BJXZPYMWvES6RmyKtzMHRQP pnU0jl6ETfR/mkhrz3AzTDbSr4x6sClofrHOwXPQN87TQmx0v23xH4WVcXGfZe7gZtPf rZQGUnjcEg2a4zAdjzCLvCOJgOR3f7t9dV5sbf1CAv2qkgfoLY4mCDUqtrX4AQcjxhJV fRRJw9aEi8J+NMbzznA4lPdZY3JRaFhHQ+KHEcBbb4+XiWkYUrFVUXBJMv43ubLm07xV vg== Received: from apblrppmta01.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3sax18rh10-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 07 Aug 2023 13:39:21 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 377Dcvnu006258; Mon, 7 Aug 2023 13:38:58 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 3s9fgkp5th-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Mon, 07 Aug 2023 13:38:58 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 377DcvSq006294; Mon, 7 Aug 2023 13:38:58 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-rohiagar-hyd.qualcomm.com [10.213.106.138]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 377Dcv72006336; Mon, 07 Aug 2023 13:38:58 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id 466C31B67; Mon, 7 Aug 2023 19:08:57 +0530 (+0530) From: Rohit Agarwal To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, vkoul@kernel.org, kishon@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, abel.vesa@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Rohit Agarwal Subject: [PATCH RESEND v2 5/9] arm64: dts: qcom: Add pmx75 PMIC dtsi Date: Mon, 7 Aug 2023 19:08:50 +0530 Message-Id: <1691415534-31820-6-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1691415534-31820-1-git-send-email-quic_rohiagar@quicinc.com> References: <1691415534-31820-1-git-send-email-quic_rohiagar@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 1TtmS8pYVYXVa15RQChZMf-RlpIbNqhZ X-Proofpoint-ORIG-GUID: 1TtmS8pYVYXVa15RQChZMf-RlpIbNqhZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-07_14,2023-08-03_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 phishscore=0 impostorscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 mlxlogscore=568 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308070127 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add dtsi for pmx75 PMIC found in Qualcomm platforms. Signed-off-by: Rohit Agarwal Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pmx75.dtsi | 64 +++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmx75.dtsi diff --git a/arch/arm64/boot/dts/qcom/pmx75.dtsi b/arch/arm64/boot/dts/qcom/pmx75.dtsi new file mode 100644 index 0000000..373e45f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmx75.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include + +/ { + thermal-zones { + pmx75-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmx75_temp_alarm>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmx75: pmic@1 { + compatible = "qcom,pmx75", "qcom,spmi-pmic"; + reg = <1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmx75_temp_alarm: temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmx75_gpios: gpio@8800 { + compatible = "qcom,pmx75-gpio", "qcom,spmi-gpio"; + reg = <0x8800>; + gpio-controller; + gpio-ranges = <&pmx75_gpios 0 0 16>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +};