From patchwork Fri Oct 27 10:57:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 10029601 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D993C602D6 for ; Fri, 27 Oct 2017 10:57:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C9D1028F4D for ; Fri, 27 Oct 2017 10:57:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BEAF628F82; Fri, 27 Oct 2017 10:57:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5800F28F4D for ; Fri, 27 Oct 2017 10:57:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752239AbdJ0K5l (ORCPT ); Fri, 27 Oct 2017 06:57:41 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:38700 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752151AbdJ0K5k (ORCPT ); Fri, 27 Oct 2017 06:57:40 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 9D3496083D; Fri, 27 Oct 2017 10:57:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1509101860; bh=QIved4XBz/WDCjb5RYpzJKAjagQXlbfE/ZTI00+DYrk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GTMNyR/KQwcBtEMvh3h9HOADFbubipStf+WMzssUegH8eLSE0wX5xJBMhVxBTvX9t 6+MUYXYNLSrQAWkHRgpZN5Lai/y4XyXOY5m237pud7Ois3vy0mQ0gIfQUGZD6S4/TR bd7dPCw19RyOn6fyT1tcR1DBlvUC/gLRgDMMfDg0= Received: from localhost (blr-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 689D26083D; Fri, 27 Oct 2017 10:57:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1509101859; bh=QIved4XBz/WDCjb5RYpzJKAjagQXlbfE/ZTI00+DYrk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oAp3epHcuh33cBELFr5Jbsx4HYHl9n6VMm4NNbkptXGx5/+uuwSC3bl2bGqGoME5T d/j7PLP74nDK35SRCjsazEvrtBUUKWcd2vySnkiDXcbO4mip5zIwQFUMneGi7GcVoE JyW3qCL0fo70ZFOjbVoBgbXcPe+FrVpfrs1+qo/E= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 689D26083D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=architt@codeaurora.org From: Archit Taneja To: robdclark@gmail.com Cc: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Archit Taneja Subject: [PATCH 1/6] drm/msm/hdmi: Keep the HDMI_CTRL_ENABLE bitfield always on for 8x96 Date: Fri, 27 Oct 2017 16:27:27 +0530 Message-Id: <20171027105732.19235-2-architt@codeaurora.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20171027105732.19235-1-architt@codeaurora.org> References: <20171027105732.19235-1-architt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ENABLE field in REG_HDMI_CTRL is required to be set to detect hot plug events on 8x96. We don't get any HPD interrupts when HDMI bridge is disabled. Keep it always on. Downstream also seems to do the same thing. Restrict this quirk only to 8x96, since we're not entirely sure whether this is a legitimate fix for other platforms or not. Signed-off-by: Archit Taneja --- drivers/gpu/drm/msm/hdmi/hdmi.c | 3 +++ drivers/gpu/drm/msm/hdmi/hdmi.h | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c index e63dc0fb55f8..747f69f8321a 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c @@ -39,6 +39,8 @@ void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) } } else { ctrl = HDMI_CTRL_HDMI; + if (hdmi->config->keep_ctrl_on) + ctrl |= HDMI_CTRL_ENABLE; } hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); @@ -406,6 +408,7 @@ static struct hdmi_platform_config hdmi_tx_8996_config = { HDMI_CFG(pwr_clk, 8x74), HDMI_CFG(hpd_clk, 8x74), .hpd_freq = hpd_clk_freq_8x74, + .keep_ctrl_on = true, }; static const struct { diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h index accc9a61611d..64291551fff6 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.h +++ b/drivers/gpu/drm/msm/hdmi/hdmi.h @@ -121,6 +121,9 @@ struct hdmi_platform_config { /* gpio's: */ struct hdmi_gpio_data gpios[HDMI_MAX_NUM_GPIO]; + + /* quirks, etc. */ + bool keep_ctrl_on; }; void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on);