From patchwork Wed Nov 1 17:53:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Riegel X-Patchwork-Id: 10036841 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 41E796032D for ; Wed, 1 Nov 2017 17:54:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3452F28BC2 for ; Wed, 1 Nov 2017 17:54:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 27B8D28C2C; Wed, 1 Nov 2017 17:54:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE6F828BC2 for ; Wed, 1 Nov 2017 17:54:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754817AbdKARxt (ORCPT ); Wed, 1 Nov 2017 13:53:49 -0400 Received: from mail.savoirfairelinux.com ([208.88.110.44]:51306 "EHLO mail.savoirfairelinux.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751603AbdKARxo (ORCPT ); Wed, 1 Nov 2017 13:53:44 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.savoirfairelinux.com (Postfix) with ESMTP id 541D49C2CA2; Wed, 1 Nov 2017 13:53:43 -0400 (EDT) Received: from mail.savoirfairelinux.com ([127.0.0.1]) by localhost (mail.savoirfairelinux.com [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id MrrsqvEF2hu2; Wed, 1 Nov 2017 13:53:42 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mail.savoirfairelinux.com (Postfix) with ESMTP id EE0749C2EE8; Wed, 1 Nov 2017 13:53:41 -0400 (EDT) X-Virus-Scanned: amavisd-new at mail.savoirfairelinux.com Received: from mail.savoirfairelinux.com ([127.0.0.1]) by localhost (mail.savoirfairelinux.com [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id W6ArbYQF4vwf; Wed, 1 Nov 2017 13:53:41 -0400 (EDT) Received: from workotop.mtl.sfl (unknown [192.168.49.115]) by mail.savoirfairelinux.com (Postfix) with ESMTPSA id A5CD59C2EDD; Wed, 1 Nov 2017 13:53:41 -0400 (EDT) From: Damien Riegel To: linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Andy Gross , David Brown , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , kernel@savoirfairelinux.com, Damien Riegel Subject: [PATCH 3/4] arm64: dts: qcom: msm8916: normalize I2C bindings Date: Wed, 1 Nov 2017 13:53:34 -0400 Message-Id: <20171101175335.22123-4-damien.riegel@savoirfairelinux.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171101175335.22123-1-damien.riegel@savoirfairelinux.com> References: <20171101175335.22123-1-damien.riegel@savoirfairelinux.com> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The QUP core can be used either for I2C or SPI, so the same IP is mapped by a driver or the other. SPI bindings use a leading 0 for the start address and a size of 0x600, I2C bindings don't have the leading 0 and have a size 0x1000. To make them more similar, add the leading 0 to I2C bindings and changes the size to 0x600, as the driver only accesses registers up to address 0x408. Also align the second entry of the clocks array. Signed-off-by: Damien Riegel --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index e16ba8334518..de25bd6070f5 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -457,10 +457,10 @@ blsp_i2c2: i2c@78b6000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b6000 0x1000>; + reg = <0x078b6000 0x600>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c2_default>; @@ -472,10 +472,10 @@ blsp_i2c4: i2c@78b8000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b8000 0x1000>; + reg = <0x078b8000 0x600>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c4_default>; @@ -487,10 +487,10 @@ blsp_i2c6: i2c@78ba000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78ba000 0x1000>; + reg = <0x078ba000 0x600>; interrupts = ; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; clock-names = "iface", "core"; pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c6_default>;