From patchwork Fri Nov 10 17:26:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 10053483 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B36C160365 for ; Fri, 10 Nov 2017 17:27:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 99D952B15D for ; Fri, 10 Nov 2017 17:27:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8E9082B30F; Fri, 10 Nov 2017 17:27:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 48FDF2B2CA for ; Fri, 10 Nov 2017 17:27:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753180AbdKJR1B (ORCPT ); Fri, 10 Nov 2017 12:27:01 -0500 Received: from foss.arm.com ([217.140.101.70]:33136 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751541AbdKJR1A (ORCPT ); Fri, 10 Nov 2017 12:27:00 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 48CE614; Fri, 10 Nov 2017 09:27:00 -0800 (PST) Received: from armageddon.cambridge.arm.com (armageddon.cambridge.arm.com [10.1.206.84]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 387103F246; Fri, 10 Nov 2017 09:26:59 -0800 (PST) Date: Fri, 10 Nov 2017 17:26:56 +0000 From: Catalin Marinas To: Stephen Boyd Cc: Will Deacon , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH] arm64: cpu_errata: Add Kryo to Falkor 1003 errata Message-ID: <20171110172656.zvnpfjkky7rqumyf@armageddon.cambridge.arm.com> References: <20171108190029.19835-1-sboyd@codeaurora.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20171108190029.19835-1-sboyd@codeaurora.org> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Wed, Nov 08, 2017 at 11:00:29AM -0800, Stephen Boyd wrote: > The Kryo CPUs are also affected by the Falkor 1003 errata, so > we need to do the same workaround on Kryo CPUs. The MIDR is > slightly more complicated here, where the PART number is not > always the same when looking at all the bits from 15 to 4. Drop > the lower 8 bits and just look at the top 4 to see if it's '2' > and then consider those as Kryo CPUs. This covers all the > combinations without having to list them all out. > > Signed-off-by: Stephen Boyd > --- > > We may need to introduce another Kconfig option to block software PAN > from being enabled when this errata is enabled (and then have software PAN > depend on this new config being false). It depends on whether you'd want to use SW PAN together with these CPUs. From a defconfig + single Image perspective, SW PAN is disabled but it would be nice to allow single Image with both E1003 and SW PAN configs enabled (though SW PAN wouldn't be used at run-time). As a quick hack, something like below but we may want to add a separate cap bit as a minor optimisation (not sure it makes a difference). Untested: ------------------8<-------------------------- > Otherwise, I can take a look at updating the software PAN implementation > to handle this errata, but that is probably a dead-end? It will probably be more intrusive and would also make SW PAN a lot slower. I don't think it's worth it. diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index ac67cfc2585a..8d2ddaef70a2 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -268,7 +268,8 @@ static inline bool system_supports_fpsimd(void) static inline bool system_uses_ttbr0_pan(void) { return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) && - !cpus_have_const_cap(ARM64_HAS_PAN); + !cpus_have_const_cap(ARM64_HAS_PAN) && + !cpus_have_const_cap(ARM64_WORKAROUND_QCOM_FALKOR_E1003); } ------------------8<--------------------------