From patchwork Fri Jan 26 01:13:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 10184971 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 01F2F601D5 for ; Fri, 26 Jan 2018 01:14:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E4CEC288BF for ; Fri, 26 Jan 2018 01:14:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D8E0828BDD; Fri, 26 Jan 2018 01:14:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 40367288BF for ; Fri, 26 Jan 2018 01:14:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751715AbeAZBOG (ORCPT ); Thu, 25 Jan 2018 20:14:06 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:39268 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751444AbeAZBOD (ORCPT ); Thu, 25 Jan 2018 20:14:03 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id DA5CC60A97; Fri, 26 Jan 2018 01:14:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516929242; bh=GropLL5BN2mleEsvnlKAIhD4kFp8sYenGlLsJaeGEiA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oUoaMs8nxMJEiBlETeXEYLwWAFW7X8db5vOX8IMm7P32cHgZ2AFhlQS1oLDjmEhCZ jbTjwXXXfBRUEJzrr7oXbD3vWTZCA03q0Kw92PVTtKLCzn52MoqI4Q8rPYU6XCf/eJ UawIq8q2ZAwNar6JNtaZMC8va1JFI61eUsZ5zzbk= Received: from sboyd-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C4FA86050D; Fri, 26 Jan 2018 01:14:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1516929242; bh=GropLL5BN2mleEsvnlKAIhD4kFp8sYenGlLsJaeGEiA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oUoaMs8nxMJEiBlETeXEYLwWAFW7X8db5vOX8IMm7P32cHgZ2AFhlQS1oLDjmEhCZ jbTjwXXXfBRUEJzrr7oXbD3vWTZCA03q0Kw92PVTtKLCzn52MoqI4Q8rPYU6XCf/eJ UawIq8q2ZAwNar6JNtaZMC8va1JFI61eUsZ5zzbk= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C4FA86050D Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org From: Stephen Boyd To: Linus Walleij Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Timur Tabi , Andy Shevchenko , Bjorn Andersson , linux-gpio@vger.kernel.org, Grant Likely , devicetree@vger.kernel.org Subject: [PATCH v2 1/3] dt-bindings: pinctrl: Add a reserved-gpio-ranges property Date: Thu, 25 Jan 2018 17:13:58 -0800 Message-Id: <20180126011400.2191-2-sboyd@codeaurora.org> X-Mailer: git-send-email 2.15.0.374.g5f9953d2c365 In-Reply-To: <20180126011400.2191-1-sboyd@codeaurora.org> References: <20180126011400.2191-1-sboyd@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some qcom platforms make some GPIOs or pins unavailable for use by non-secure operating systems, and thus reading or writing the registers for those pins will cause access control issues. Introduce a DT property to describe the set of GPIOs that are available for use so that higher level OSes are able to know what pins to avoid reading/writing. Cc: Grant Likely Cc: Signed-off-by: Stephen Boyd Acked-by: Bjorn Andersson --- Documentation/devicetree/bindings/gpio/gpio.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index b5de08e3b1a2..c22b56680fc8 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -151,9 +151,9 @@ in a lot of designs, some using all 32 bits, some using 18 and some using first 18 GPIOs, at local offset 0 .. 17, are in use. If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an -additional bitmask is needed to specify which GPIOs are actually in use, -and which are dummies. The bindings for this case has not yet been -specified, but should be specified if/when such hardware appears. +additional set of tuples is needed to specify which GPIOs are unusable, with +the reserved-gpio-ranges binding. This property indicates the start and size +of the GPIOs that can't be used. Optionally, a GPIO controller may have a "gpio-line-names" property. This is an array of strings defining the names of the GPIO lines going out of the @@ -178,6 +178,7 @@ gpio-controller@00000000 { gpio-controller; #gpio-cells = <2>; ngpios = <18>; + reserved-gpio-ranges = <0 4>, <12 2>; gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R", "LED G", "LED B", "Col A", "Col B", "Col C", "Col D", "Row A", "Row B", "Row C", "Row D", "NMI button",