From patchwork Tue Jul 3 19:48:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 10505071 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 706E6601D3 for ; Tue, 3 Jul 2018 19:48:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6119E28870 for ; Tue, 3 Jul 2018 19:48:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 54DCD28B65; Tue, 3 Jul 2018 19:48:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 471DD28B3E for ; Tue, 3 Jul 2018 19:48:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752938AbeGCTsR (ORCPT ); Tue, 3 Jul 2018 15:48:17 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:35845 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752920AbeGCTsP (ORCPT ); Tue, 3 Jul 2018 15:48:15 -0400 Received: by mail-yw0-f194.google.com with SMTP id t198-v6so1128421ywc.3 for ; Tue, 03 Jul 2018 12:48:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3Tprq0/jRwZ5caS90SVqaJYlxdlsOPyQdb7K6ZbY5Kw=; b=T3OVrNQFOaeHnZvAQQa0GGEPDWN6ESeiAMx6mGMLJc/cZIAyJJUvO/jdJG0+ckQrlr x/6IVGWTN1dH9oF4nGcyqNtLjp65TgoVoJgFJfwofv+7JLhHv9u0HenoULILCqRAekWt Dyjuv0R/55wh/RvW4T/hutfn6kY6D4nQvCZ6g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3Tprq0/jRwZ5caS90SVqaJYlxdlsOPyQdb7K6ZbY5Kw=; b=LbW/OdTb62lmOe+JtsYSjWJzaAA1Rja5+XUxmQdJKXuJfrwm1ShRPQtj3Xv7q+0p0P tpqlsrYB4a3XhZYH534JDd4bdh3CSCkU2gXRJlkD+V6ePoiLg64jlD4bYz+QF/z27Si5 bCR2VRsBDODFguCRRKSVTl0mDLSiAb+DXjy8l6+/JytXmeI+QH2Olsa/EemGDhYjjzT9 pTDVum0WQYPhNGTsgMTEMbOEOBKa7m+4sT63aSzJdGnhAoCnUk1/O3HSC9t1RRr346I2 7/KKmtrDshLzyK2Y5QvbJkPSS14jbj91+4Dj39xY3FV1HvoCRl31Wgcsl2E+6fBkWPJi GFEg== X-Gm-Message-State: APt69E0x4dcY0VVTbu3Ck7RCEOx5P/+3BCtlW+VirldJ0sC4xW8iz4MX wFIPdyckWMa0TPLTJYxG2vb3mA== X-Google-Smtp-Source: AAOMgpfDbmGiO+5JHY5wek7f9O/Oo01w9vv3DyX9ZPsf0f+jdnyigLPCp5U4tOHr/0vOcSX4Mf5rTw== X-Received: by 2002:a81:26c1:: with SMTP id m184-v6mr15895580ywm.388.1530647295255; Tue, 03 Jul 2018 12:48:15 -0700 (PDT) Received: from rosewood.cam.corp.google.com ([2620:0:1013:11:ad55:b1db:adfe:3b9f]) by smtp.gmail.com with ESMTPSA id y4-v6sm647516ywe.48.2018.07.03.12.48.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 03 Jul 2018 12:48:14 -0700 (PDT) From: Sean Paul To: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Cc: robdclark@gmail.com, hoegsberg@chromium.org, jsanka@codeaurora.org, abhinavk@codeaurora.org, ryadav@codeaurora.org, Sean Paul Subject: [DPU PATCH 2/3] dt-bindings: dpu: Fixup dt-bindings discrepencies Date: Tue, 3 Jul 2018 15:48:11 -0400 Message-Id: <20180703194812.154013-2-seanpaul@chromium.org> X-Mailer: git-send-email 2.18.0.399.gad0ab374a1-goog In-Reply-To: <20180703194812.154013-1-seanpaul@chromium.org> References: <20180703194812.154013-1-seanpaul@chromium.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Sean Paul Reviewed-by: Rajesh Yadav --- .../devicetree/bindings/display/msm/dpu.txt | 22 +++++++++++-------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu.txt b/Documentation/devicetree/bindings/display/msm/dpu.txt index a4407b848faf..d3b13a517579 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu.txt +++ b/Documentation/devicetree/bindings/display/msm/dpu.txt @@ -39,6 +39,7 @@ Required properties: - reg: physical base address and length of controller's registers. - reg-names : register region names. The following region is required: * "mdp_phys" + * "vbif_phys" - clocks: list of phandles for clock device nodes needed by the device. - clock-names: device clock names, must be in same order as clocks property. The following clocks are required. @@ -74,15 +75,16 @@ Example: power-domains = <&clock_dispcc 0>; clocks = <&gcc GCC_DISP_AHB_CLK>, - <&gcc GCC_DISP_AXI_CLK>, - <&clock_dispcc DISP_CC_MDSS_MDP_CLK>; - clock-names = "gcc_iface", "gcc_bus", "core_clk"; + <&gcc GCC_DISP_AXI_CLK>, + <&clock_dispcc DISP_CC_MDSS_MDP_CLK>; + clock-names = "iface_clk", "bus_clk", "core_clk"; + clock-frequency = <0 0 300000000>; interrupts = ; interrupt-controller; #interrupt-cells = <1>; - iommus = <&apps_smmu 0>; + iommus = <&apps_iommu 0>; #address-cells = <1>; #size-cells = <1>; @@ -90,14 +92,16 @@ Example: mdss_mdp: mdp@ae01000 { compatible = "qcom,dpu"; - reg = <0x0ae01000 0x8f000>; - reg-names = "mdp_phys"; + reg = <0x0ae01000 0x8f000>, + <0x0aeb0000 0x2008>; + reg-names = "mdp_phys", "vbif_phys"; clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, - <&clock_dispcc DISP_CC_MDSS_AXI_CLK>, - <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, - <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>; + <&clock_dispcc DISP_CC_MDSS_AXI_CLK>, + <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, + <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>; clock-names = "iface_clk", "bus_clk", "core_clk", "vsync_clk"; + clock-frequency = <0 0 300000000 19200000>; interrupt-parent = <&mdss>; interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;