From patchwork Mon Nov 12 08:05:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 10678305 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D98AE1759 for ; Mon, 12 Nov 2018 08:02:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CC5BC29E62 for ; Mon, 12 Nov 2018 08:02:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C086129E7C; Mon, 12 Nov 2018 08:02:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 34F3329E78 for ; Mon, 12 Nov 2018 08:02:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728726AbeKLRyP (ORCPT ); Mon, 12 Nov 2018 12:54:15 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:41306 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729166AbeKLRyO (ORCPT ); Mon, 12 Nov 2018 12:54:14 -0500 Received: by mail-pg1-f195.google.com with SMTP id 70so3694628pgh.8 for ; Mon, 12 Nov 2018 00:02:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wvT2MV0cpdZ3I4k2m3tel+zZFqPKLYuEhJfBEnHZVEo=; b=PcIDnS4YOg2mmEqT5vkPQNSDhtzUaLrdG5VD9MHpQXC+J1fCSwTPr24UTdcMZI28GP z3jjdZLGP6dECqP7n5xUKx3TzzjD5jXVVIvDkFBjbcQbAX98BhpoGCvygQYbrnmWqZXQ iCBrAdmpUoYLqnJ1ZFFvSBk/Q7BKut22JGWgA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wvT2MV0cpdZ3I4k2m3tel+zZFqPKLYuEhJfBEnHZVEo=; b=qkZ4f6vxb4HqRKx59e6gjrk2UfkEDUD3V4x9OdMYzbzRtOML2qVZBPmcQXK3doy7Q5 Dhz2i2pO9iBvRIm9C9SqQF5jksWPO/dek59DV2Dfy4Z6CCYHf1Tpts558Z4uMuYaFyxH dzj6myGduHU77TakP20C/pQReCRlM25OGTjeXneoLSyHpz8hWWxt4cCPlkmYoGfZGY6y SAQuGHRDHV9g0W88GGtVCyZCDdwdtc1iSVA60byy825AntETQZhvPop1kNvRhjcUk35v xkiHO4nidN3OzxQpPKjOYcNo9yJWZTcdQqdpYrgYMDFwSLia6UwCqA11yeJcoXVHXZWB 7C7Q== X-Gm-Message-State: AGRZ1gI7rKy8Uu/VqXQuz25iUfGd3z8xfMr34lrLv1HxLDiuyipFpmGZ oY7D/guqDw3imUnKCUhCueezgg== X-Google-Smtp-Source: AJdET5es5vksXKydOwxNsn4mt9yfFgKB03XqwHh59ZSuXEo27rpkU9DPPFjgjzq9Q2TDbkP2W3N0aw== X-Received: by 2002:a65:434d:: with SMTP id k13mr3800506pgq.269.1542009730225; Mon, 12 Nov 2018 00:02:10 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id 134sm13590085pgb.78.2018.11.12.00.02.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Nov 2018 00:02:09 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] soc: qcom: Add AOSS QMP genpd provider Date: Mon, 12 Nov 2018 00:05:57 -0800 Message-Id: <20181112080557.22698-4-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181112080557.22698-1-bjorn.andersson@linaro.org> References: <20181112080557.22698-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The AOSS QMP genpd provider implements control over power-related resources related to low-power state associated with the remoteprocs in the system as well as control over a set of clocks related to debug hardware in the SoC. Signed-off-by: Bjorn Andersson --- drivers/soc/qcom/Kconfig | 8 ++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/aoss-qmp-pd.c | 135 +++++++++++++++++++++++++++++++++ 3 files changed, 144 insertions(+) create mode 100644 drivers/soc/qcom/aoss-qmp-pd.c diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index ba08fc00d7f5..e1eda3d59748 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -10,6 +10,14 @@ config QCOM_AOSS_QMP micro-controller in the AOSS, using QMP, to control certain resource that are not exposed through RPMh. +config QCOM_AOSS_QMP_PD + tristate "Qualcomm AOSS Messaging Power Domain driver" + depends on QCOM_AOSS_QMP + help + This driver provides the means of controlling the AOSSs handling of + low-power state for resources related to the remoteproc subsystems as + well as controlling the debug clocks. + config QCOM_COMMAND_DB bool "Qualcomm Command DB" depends on ARCH_QCOM || COMPILE_TEST diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index d0d7fdc94d9a..ebfa414a5b77 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 CFLAGS_rpmh-rsc.o := -I$(src) obj-$(CONFIG_QCOM_AOSS_QMP) += aoss-qmp.o +obj-$(CONFIG_QCOM_AOSS_QMP_PD) += aoss-qmp-pd.o obj-$(CONFIG_QCOM_GENI_SE) += qcom-geni-se.o obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o obj-$(CONFIG_QCOM_GLINK_SSR) += glink_ssr.o diff --git a/drivers/soc/qcom/aoss-qmp-pd.c b/drivers/soc/qcom/aoss-qmp-pd.c new file mode 100644 index 000000000000..467d0db4abfa --- /dev/null +++ b/drivers/soc/qcom/aoss-qmp-pd.c @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2018, Linaro Ltd + */ +#include +#include +#include +#include +#include +#include + +#include + +struct qmp_pd { + struct qmp *qmp; + + struct generic_pm_domain pd; + + const char *name; +}; + +#define to_qmp_pd_resource(res) container_of(res, struct qmp_pd, pd) + +struct qmp_pd_resource { + const char *name; + int (*on)(struct generic_pm_domain *domain); + int (*off)(struct generic_pm_domain *domain); +}; + +static int qmp_pd_clock_toggle(struct qmp_pd *res, bool enable) +{ + char buf[96]; + size_t n; + + n = snprintf(buf, sizeof(buf), "{class: clock, res: %s, val: %d}", + res->name, !!enable); + return qmp_send(res->qmp, buf, n); +} + +static int qmp_pd_clock_on(struct generic_pm_domain *domain) +{ + return qmp_pd_clock_toggle(to_qmp_pd_resource(domain), true); +} + +static int qmp_pd_clock_off(struct generic_pm_domain *domain) +{ + return qmp_pd_clock_toggle(to_qmp_pd_resource(domain), false); +} + +static int qmp_pd_image_toggle(struct qmp_pd *res, bool enable) +{ + char buf[96]; + size_t n; + + n = snprintf(buf, sizeof(buf), + "{class: image, res: load_state, name: %s, val: %s}", + res->name, enable ? "on" : "off"); + return qmp_send(res->qmp, buf, sizeof(buf)); +} + +static int qmp_pd_image_on(struct generic_pm_domain *domain) +{ + return qmp_pd_image_toggle(to_qmp_pd_resource(domain), true); +} + +static int qmp_pd_image_off(struct generic_pm_domain *domain) +{ + return qmp_pd_image_toggle(to_qmp_pd_resource(domain), false); +} + +static const struct qmp_pd_resource sdm845_resources[] = { + [AOSS_QMP_QDSS_CLK] = { "qdss", qmp_pd_clock_on, qmp_pd_clock_off }, + [AOSS_QMP_LS_CDSP] = { "cdsp", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_LPASS] = { "adsp", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_MODEM] = { "modem", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_SLPI] = { "slpi", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_SPSS] = { "spss", qmp_pd_image_on, qmp_pd_image_off }, + [AOSS_QMP_LS_VENUS] = { "venus", qmp_pd_image_on, qmp_pd_image_off }, +}; + +static int qmp_pd_probe(struct platform_device *pdev) +{ + struct genpd_onecell_data *data; + struct qmp_pd *res; + struct qmp *qmp; + size_t num = ARRAY_SIZE(sdm845_resources); + int i; + + qmp = dev_get_drvdata(pdev->dev.parent); + if (!qmp) + return -EINVAL; + + res = devm_kcalloc(&pdev->dev, num, sizeof(*res), GFP_KERNEL); + if (!res) + return -ENOMEM; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->domains = devm_kcalloc(&pdev->dev, num, sizeof(*data->domains), + GFP_KERNEL); + + for (i = 0; i < num; i++) { + pm_genpd_init(&res[i].pd, NULL, true); + res[i].qmp = qmp; + res[i].name = sdm845_resources[i].name; + + res[i].pd.name = sdm845_resources[i].name; + res[i].pd.power_on = sdm845_resources[i].on; + res[i].pd.power_off = sdm845_resources[i].off; + + data->domains[data->num_domains++] = &res[i].pd; + } + + return of_genpd_add_provider_onecell(pdev->dev.of_node, data); +} + +static const struct of_device_id qmp_pd_dt_match[] = { + { .compatible = "qcom,sdm845-aoss-qmp-pd", }, + {} +}; +MODULE_DEVICE_TABLE(of, qmp_pd_dt_match); + +static struct platform_driver qmp_pd_driver = { + .driver = { + .name = "aoss_qmp_pd", + .of_match_table = qmp_pd_dt_match, + }, + .probe = qmp_pd_probe, +}; +module_platform_driver(qmp_pd_driver); + +MODULE_DESCRIPTION("Qualcomm AOSS QMP load-state driver"); +MODULE_LICENSE("GPL v2");