From patchwork Wed Dec 5 16:29:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 10714551 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7D4C14E2 for ; Wed, 5 Dec 2018 16:30:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A77C12DC3E for ; Wed, 5 Dec 2018 16:30:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9BA182DC4D; Wed, 5 Dec 2018 16:30:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 076C22DC3E for ; Wed, 5 Dec 2018 16:30:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727195AbeLEQaD (ORCPT ); Wed, 5 Dec 2018 11:30:03 -0500 Received: from mail-yw1-f66.google.com ([209.85.161.66]:33679 "EHLO mail-yw1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727240AbeLEQaD (ORCPT ); Wed, 5 Dec 2018 11:30:03 -0500 Received: by mail-yw1-f66.google.com with SMTP id q11so8794688ywa.0 for ; Wed, 05 Dec 2018 08:30:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=poorly.run; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=G94Eu5gU6RTEWJIidkNWF5B94PVih5AphIDwP6zjUto=; b=b7k8ToUXiTd4kbYxDxOPbDv8jMuq+YWsEe/Z9+DQE92Z5MTky0XPkG9PT3WpowWdGF chTxnvwpaWkTLCETNXjAkZF2USm/pOa4dQ10stekCFvYVsN8W2sVc0unUBp18UVqojG7 0GkYHf8FQg2fHCwpkoEdgp/0vh0Qu3i86bqW9PCJ3aVUJsXL0LLW5GG3+1tdeapnZi4b kUG4IqnEP0QSKiX+5AIHQV/4NTaincU3QaMmAvUsVuJyc5xelrKSA8PDxfuop+hLQDEd NkxUfAuezlGpu/1tRWoUnyFJwxdGsgNOJvHakEY6B+kHCIeqxyyOZ5qFy0d1NTZxvYBx df9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=G94Eu5gU6RTEWJIidkNWF5B94PVih5AphIDwP6zjUto=; b=aRiBpm25QMSCC8h8tnaDQHZXTGZWLHklIBZHaWmEQXbtHohVtBoa0A0LN+iPuh0sa9 L/YMkkQH0VYwbYZkemY62ATKGmrRzyGx/EgiTCvB63E/I56TQHE1jsIT32bM3AwuhKvr WnJHWMuAmm+jt0Zghn8ZLopF3UmABgCjPQ11h3mNvYAFc29/AjeV3eBAx+Yp2H7wv0BG h1ivAF9KrDPw6QJfa96Xx/jd1eld9+Jmn4C5Jk4FZL0FHhaLssTWT6F1AA/fA8dCBcow pI51od0y7e8HrvExy9pdhXxJRvjJDO5sIlwzk3qV6gROdkoj0sT5R+DTJM8n+M/H+/KZ CSdg== X-Gm-Message-State: AA+aEWbiSkWmGnCCeRx4NyNiR9Gj6yDMgkR4LDOIJW5jWYTfGFDWjhxa iEW6y7OGbPSnCAgNkbPFMve/YQ== X-Google-Smtp-Source: AFSGD/VPX1EYnVaujezwu+IOoTPP21fgW5ultxTNtG0WCrFFoZgVKsgd/zLr2p7aRpPcep0U9hEUmA== X-Received: by 2002:a81:6a04:: with SMTP id f4mr24998434ywc.485.1544027402062; Wed, 05 Dec 2018 08:30:02 -0800 (PST) Received: from rosewood.cam.corp.google.com ([2620:0:1013:11:ad55:b1db:adfe:3b9f]) by smtp.gmail.com with ESMTPSA id n133sm6460470ywb.55.2018.12.05.08.30.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Dec 2018 08:30:01 -0800 (PST) From: Sean Paul Cc: robdclark@gmail.com, jsanka@codeaurora.org, Sean Paul , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH 2/9] drm/msm: Don't track encoders in msm private struct Date: Wed, 5 Dec 2018 11:29:34 -0500 Message-Id: <20181205162958.25025-2-sean@poorly.run> X-Mailer: git-send-email 2.20.0.rc1.387.gf8505762e3-goog In-Reply-To: <20181205162958.25025-1-sean@poorly.run> References: <20181205162958.25025-1-sean@poorly.run> MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sean Paul drm core already tracks this, so we can just lean on that instead of tracking ourselves. Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 16 ++++++++-------- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 5 ----- drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 12 ++++-------- drivers/gpu/drm/msm/msm_drv.h | 3 --- 4 files changed, 12 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 3796a2978a40b..cbebc04e2d6ef 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -457,8 +457,6 @@ static void _dpu_kms_initialize_dsi(struct drm_device *dev, return; } - priv->encoders[priv->num_encoders++] = encoder; - for (i = 0; i < ARRAY_SIZE(priv->dsi); i++) { if (!priv->dsi[i]) { DPU_DEBUG("invalid msm_dsi for ctrl %d\n", i); @@ -498,6 +496,7 @@ static void _dpu_kms_drm_obj_destroy(struct dpu_kms *dpu_kms) { struct msm_drm_private *priv; struct drm_crtc *crtc; + struct drm_encoder *encoder; int i; if (!dpu_kms) { @@ -523,9 +522,8 @@ static void _dpu_kms_drm_obj_destroy(struct dpu_kms *dpu_kms) priv->connectors[i]->funcs->destroy(priv->connectors[i]); priv->num_connectors = 0; - for (i = 0; i < priv->num_encoders; i++) - priv->encoders[i]->funcs->destroy(priv->encoders[i]); - priv->num_encoders = 0; + drm_for_each_encoder(encoder, dpu_kms->dev) + encoder->funcs->destroy(encoder); } static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) @@ -534,6 +532,7 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) struct drm_plane *primary_planes[MAX_PLANES], *plane; struct drm_plane *cursor_planes[MAX_PLANES] = { NULL }; struct drm_crtc *crtc; + struct drm_encoder *encoder; struct msm_drm_private *priv; struct dpu_mdss_cfg *catalog; @@ -556,7 +555,8 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) */ _dpu_kms_setup_displays(dev, priv, dpu_kms); - max_crtc_count = min(catalog->mixer_count, priv->num_encoders); + max_crtc_count = min(catalog->mixer_count, + (u32)dev->mode_config.num_encoder); /* Create the planes, keeping track of one primary/cursor per crtc */ for (i = 0; i < catalog->sspp_count; i++) { @@ -601,8 +601,8 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) } /* All CRTCs are compatible with all encoders */ - for (i = 0; i < priv->num_encoders; i++) - priv->encoders[i]->possible_crtcs = (1 << max_crtc_count) - 1; + drm_for_each_encoder(encoder, dpu_kms->dev) + encoder->possible_crtcs = (1 << max_crtc_count) - 1; return 0; fail: diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c index f7f678c55e3ac..527a4ee06819f 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c @@ -266,7 +266,6 @@ static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms, return PTR_ERR(connector); } - priv->encoders[priv->num_encoders++] = encoder; priv->connectors[priv->num_connectors++] = connector; break; @@ -288,9 +287,6 @@ static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms, return ret; } } - - priv->encoders[priv->num_encoders++] = encoder; - break; case DRM_MODE_ENCODER_DSI: /* only DSI1 supported for now */ @@ -309,7 +305,6 @@ static int mdp4_modeset_init_intf(struct mdp4_kms *mdp4_kms, /* TODO: Add DMA_S later? */ encoder->possible_crtcs = 1 << DMA_P; - priv->encoders[priv->num_encoders++] = encoder; ret = msm_dsi_modeset_init(priv->dsi[dsi_id], dev, encoder); if (ret) { diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c index 4fb70532b0484..7cf54737944e4 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c @@ -332,7 +332,6 @@ static struct drm_encoder *construct_encoder(struct mdp5_kms *mdp5_kms, struct mdp5_ctl *ctl) { struct drm_device *dev = mdp5_kms->dev; - struct msm_drm_private *priv = dev->dev_private; struct drm_encoder *encoder; encoder = mdp5_encoder_init(dev, intf, ctl); @@ -341,8 +340,6 @@ static struct drm_encoder *construct_encoder(struct mdp5_kms *mdp5_kms, return encoder; } - priv->encoders[priv->num_encoders++] = encoder; - return encoder; } @@ -455,6 +452,7 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) { struct drm_device *dev = mdp5_kms->dev; struct msm_drm_private *priv = dev->dev_private; + struct drm_encoder *encoder; const struct mdp5_cfg_hw *hw_cfg; unsigned int num_crtcs; int i, ret, pi = 0, ci = 0; @@ -478,7 +476,8 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) * the MDP5 interfaces) than the number of layer mixers present in HW, * but let's be safe here anyway */ - num_crtcs = min(priv->num_encoders, mdp5_kms->num_hwmixers); + num_crtcs = min((unsigned)dev->mode_config.num_encoder, + mdp5_kms->num_hwmixers); /* * Construct planes equaling the number of hw pipes, and CRTCs for the @@ -526,11 +525,8 @@ static int modeset_init(struct mdp5_kms *mdp5_kms) * Now that we know the number of crtcs we've created, set the possible * crtcs for the encoders */ - for (i = 0; i < priv->num_encoders; i++) { - struct drm_encoder *encoder = priv->encoders[i]; - + drm_for_each_encoder(encoder, dev) encoder->possible_crtcs = (1 << num_crtcs) - 1; - } return 0; diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index fc677da06e33b..c6eff08e80170 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -197,9 +197,6 @@ struct msm_drm_private { struct msm_drm_thread disp_thread[MAX_CRTCS]; struct msm_drm_thread event_thread[MAX_CRTCS]; - unsigned int num_encoders; - struct drm_encoder *encoders[MAX_ENCODERS]; - unsigned int num_bridges; struct drm_bridge *bridges[MAX_BRIDGES];