From patchwork Fri Dec 7 17:16:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 10718607 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D3A8A15A6 for ; Fri, 7 Dec 2018 17:17:07 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C345E2ECE2 for ; Fri, 7 Dec 2018 17:17:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B6AD72F1DF; Fri, 7 Dec 2018 17:17:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 19B592ECE2 for ; Fri, 7 Dec 2018 17:17:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726079AbeLGRRG (ORCPT ); Fri, 7 Dec 2018 12:17:06 -0500 Received: from mail-yb1-f195.google.com ([209.85.219.195]:42890 "EHLO mail-yb1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726045AbeLGRRG (ORCPT ); Fri, 7 Dec 2018 12:17:06 -0500 Received: by mail-yb1-f195.google.com with SMTP id s8so2602267ybe.9 for ; Fri, 07 Dec 2018 09:17:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=poorly.run; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=NcCl4uTJagDQT4elFyxWzwSVlegNvm07Cekfol1XUNY=; b=IpAzEDUATXA7IOQNniFcgrXaNi3VceRfHSxLbQ/1v+r8fcleZ0Zv8QzKhqOXxy6nNB /a1epk0GLyt4gwzUYlGT/3/eXNw0DbuNEOzOyMpl3EV6h7cjA1RomOTJ2bJ8VipebPwk TydHZAp6ahB0x1tkH07+kfd+XvrhEFLBML3yu3UDK7OLYFBWO+ZgKVsdSP315YctQwzQ K4dgecbvsrm0hpS++DPZGPVMNXie9/rFt6gRef32f1LQVAYDvk+KyQd0rywMqF+ydx8h IkARWOVcRdHitTAxpktTRTEBlrZDxEB2gn5ifemXhMfVzGGu8OVpvo002X6Pao8eF+Pd IW9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=NcCl4uTJagDQT4elFyxWzwSVlegNvm07Cekfol1XUNY=; b=KJtbVqUz8BLnrv/ACnM3GStMI4Ku4+/9PDB11pg+NnVmzycTpJY9ye3AlrWVVjsged b9QXMmRF8A1CbZj5S8118hzMJEynShcDTTRoR8hXutQWaNDsGMIpf4yJ3MH9PVR53zA5 dMZhaasf3rlbBXpeZsilcGgdZ73+DCR5GPYDmq7tDzAwmIKcsOqcjRmRNyv5Ii5teLpH bUzUZIFwvZF6+22QySvqv4GwKMXj49b7ag8sRhwcJpgG6LSrpOkgI5ntg69yPQREsCn0 eCTWov6JyZqkbgGdr421qcrTd96Xx1bxPILfR5pLx32eJNBw3+MgD5DlF7H7e4jucvm4 xpzg== X-Gm-Message-State: AA+aEWbh1H0VHOX61xGC8TFq+yAn9Ar5wpQL9bvU6mrngKe2VOjU7Sf5 XX7z2ERvWP7z6nLzRQuceWTRPA== X-Google-Smtp-Source: AFSGD/VzzDmrYpPAaMn8P2c2o8mUo3zGZHMIqutRS1KnUD6HEITwurbT5Xy8T/+6nRhuCXK++Ql9hA== X-Received: by 2002:a25:15c1:: with SMTP id 184-v6mr2869363ybv.332.1544203025296; Fri, 07 Dec 2018 09:17:05 -0800 (PST) Received: from rosewood.cam.corp.google.com ([2620:0:1013:11:ad55:b1db:adfe:3b9f]) by smtp.gmail.com with ESMTPSA id o14sm2270372ywo.52.2018.12.07.09.17.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Dec 2018 09:17:04 -0800 (PST) From: Sean Paul Cc: robdclark@gmail.com, jsanka@codeaurora.org, Sean Paul , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH] drm/msm: dpu: Don't enable vblank interrupts in irq_control Date: Fri, 7 Dec 2018 12:16:57 -0500 Message-Id: <20181207171703.56029-1-sean@poorly.run> X-Mailer: git-send-email 2.20.0.rc2.403.gdbc3b29805-goog MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sean Paul The irq_control function is called upon encoder enable/disable and turns on/off the vblank interrupts. Unfortunately, it enables them when the drm code is not expecting them to be on. As a result, we can get into nasty locking situations. vblank interrupts should be solely managed by the drm core via control_vblank_irq(). This patch removes the vblank irq handling from irq_control. Here's some tracing before this patch: -- CRTC is enabled, irq_control is called, drm_vblank reference is 0 25.078455: dpu_crtc_enable: id:46 enable:true state{enabled:false} -- vblank irqs incorrectly firing, drm_crtc_handle_vblank is called from them 25.290067: dpu_crtc_vblank_cb: id=46 25.306691: dpu_crtc_vblank_cb: id=46 -- drm core enables vblank interrupts, drm_vblank_reference > 0 25.311527: dpu_crtc_vblank: id:46 enable:true state{enabled:true} -- vblank irqs continue (correctly) 25.323351: dpu_crtc_vblank_cb: id=46 25.340033: dpu_crtc_vblank_cb: id=46 25.356701: dpu_crtc_vblank_cb: id=46 And after this patch: -- CRTC is enabled, irq_control does not enable vblank interrupts 123.861353: dpu_crtc_enable: id:46 enable:true state{enabled:false} -- drm core enables vblank, we enable the irq 124.192916: dpu_crtc_vblank: id:46 enable:true state{enabled:true} -- vblank irqs start at the correct time 124.200548: dpu_crtc_vblank_cb: id=46 124.217195: dpu_crtc_vblank_cb: id=46 124.233848: dpu_crtc_vblank_cb: id=46 Signed-off-by: Sean Paul Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 6 ------ 2 files changed, 8 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 99ab5ca9bed3..c9eaa3516e9a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -339,7 +339,6 @@ static void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc, if (enable) { dpu_encoder_helper_register_irq(phys_enc, INTR_IDX_PINGPONG); dpu_encoder_helper_register_irq(phys_enc, INTR_IDX_UNDERRUN); - dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, true); if (dpu_encoder_phys_cmd_is_master(phys_enc)) dpu_encoder_helper_register_irq(phys_enc, @@ -350,7 +349,6 @@ static void dpu_encoder_phys_cmd_irq_control(struct dpu_encoder_phys *phys_enc, INTR_IDX_CTL_START); dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_UNDERRUN); - dpu_encoder_phys_cmd_control_vblank_irq(phys_enc, false); dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_PINGPONG); } } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index acdab5b0db18..e3125a1ab3dc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -706,7 +706,6 @@ static void dpu_encoder_phys_vid_irq_control(struct dpu_encoder_phys *phys_enc, bool enable) { struct dpu_encoder_phys_vid *vid_enc; - int ret; if (!phys_enc) return; @@ -719,13 +718,8 @@ static void dpu_encoder_phys_vid_irq_control(struct dpu_encoder_phys *phys_enc, atomic_read(&phys_enc->vblank_refcount)); if (enable) { - ret = dpu_encoder_phys_vid_control_vblank_irq(phys_enc, true); - if (ret) - return; - dpu_encoder_helper_register_irq(phys_enc, INTR_IDX_UNDERRUN); } else { - dpu_encoder_phys_vid_control_vblank_irq(phys_enc, false); dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_UNDERRUN); } }