diff mbox series

[v7,2/6] drm/msm: drop interrupt-names

Message ID 20181218183241.12830-3-jcrouse@codeaurora.org (mailing list archive)
State Not Applicable, archived
Headers show
Series arm64: dts: Add sdm845 GPU/GMU and SMMU | expand

Commit Message

Jordan Crouse Dec. 18, 2018, 6:32 p.m. UTC 
Each GPU core only uses one interrupt so we don't to look up
an interrupt by name and thereby we don't need interrupt-names.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 1 -
 1 file changed, 1 deletion(-)

Comments

Rob Herring (Arm) Dec. 18, 2018, 10:19 p.m. UTC | #1 
On Tue, 18 Dec 2018 11:32:37 -0700, Jordan Crouse wrote:
> Each GPU core only uses one interrupt so we don't to look up
> an interrupt by name and thereby we don't need interrupt-names.
> 
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>  Documentation/devicetree/bindings/display/msm/gpu.txt | 1 -
>  1 file changed, 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index 43fac0fe09bb..4ad5e70e5c3e 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -25,7 +25,6 @@  Example:
 		reg = <0x04300000 0x20000>;
 		reg-names = "kgsl_3d0_reg_memory";
 		interrupts = <GIC_SPI 80 0>;
-		interrupt-names = "kgsl_3d0_irq";
 		clock-names =
 		    "core",
 		    "iface",