From patchwork Fri Dec 21 19:41:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bruce Wang X-Patchwork-Id: 10740999 X-Patchwork-Delegate: agross@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5B1A9746 for ; Fri, 21 Dec 2018 19:41:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 48C292891B for ; Fri, 21 Dec 2018 19:41:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3C51128925; Fri, 21 Dec 2018 19:41:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C7E452891B for ; Fri, 21 Dec 2018 19:41:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391733AbeLUTlO (ORCPT ); Fri, 21 Dec 2018 14:41:14 -0500 Received: from mail-yb1-f193.google.com ([209.85.219.193]:42474 "EHLO mail-yb1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389698AbeLUTlO (ORCPT ); Fri, 21 Dec 2018 14:41:14 -0500 Received: by mail-yb1-f193.google.com with SMTP id q145so982846ybq.9 for ; Fri, 21 Dec 2018 11:41:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=qeIdR5awntX5DQ+VV5zGJ10nqjKgFO3Y5rUCPh2reLc=; b=WiYQsIGPssQmT43hJCTa0mwCrhQaC3qpK8m02AU4g2RbLDEuw95wFbZ1/aD3J2GoLs dAW92vn02QYnDQR774JEXHG5umRHFQ/Askt3v5QiqZpYfZ2SYB4MrPiNFKNb0xzig9pL YF1gwvbISym42eGvtAyj47YYxcegfOZOd/F5w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=qeIdR5awntX5DQ+VV5zGJ10nqjKgFO3Y5rUCPh2reLc=; b=XUow0H4QjWQP+InPRIiyrC7+vtakbBJh5/xougz9LMj5oyCbgn0Smmq/dyVLaAb1D/ KtozAdwVhP7WGKuTGbz0YT9mRRfduQGoe/vZjdQOGOxQ+u+GoEynkRiJoXsTb19MkQiz h1psFQWs3lwI50prPM8Zx2Gawko7OQ2X6PuC0TcpTVZEGV/8ibMPVk+q8GtUvYb5HbM2 8XrRwfv4RCBpTQLA/JItKZh1z5xdXkJnnIhCCSLPP0XKL0XkHA00ypX9KFlW9+LTgZHs nmlzLHGxsM6OUcqi1chL2m5AjliqYbFFI0IeCOeI0M9TN6D62mWll+29Cbzq86L2R0sd Hm4Q== X-Gm-Message-State: AA+aEWbDE1mmFu8Jpy8Mow/wXzGPynbYrlTyup2ETGxTeH8+tvwAJ8ZB n/+r6BvpscueTpP1eycpOnEWkN8fRj4= X-Google-Smtp-Source: AFSGD/W8P1h5AI1FK1OfqGYI7O0gdChfKRkxIIHbomd/zV/POfzm2/Qu3oP4FCx9GxUrhZJK5KBYMA== X-Received: by 2002:a25:d494:: with SMTP id m142mr3846549ybf.193.1545421272582; Fri, 21 Dec 2018 11:41:12 -0800 (PST) Received: from bzwang.cnc.corp.google.com ([2620:0:1013:11:6f9e:dcbe:41ef:a61]) by smtp.gmail.com with ESMTPSA id n2sm7898589ywe.37.2018.12.21.11.41.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 21 Dec 2018 11:41:11 -0800 (PST) From: Bruce Wang To: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Cc: seanpaul@chromium.org, jsanka@codeaurora.org, robdclark@gmail.com, jcrouse@codeaurora.org Subject: [PATCH 1/1] drm/msm/dpu: remove struct encoder_kickoff_params Date: Fri, 21 Dec 2018 14:41:10 -0500 Message-Id: <20181221194110.108573-1-bzwang@chromium.org> X-Mailer: git-send-email 2.20.1.415.g653613c723-goog MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The contents of struct encoder_kickoff_params are never used. Remove the structure and all remnants of it from function calls. Signed-off-by: Bruce Wang --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 ++----- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 7 +++---- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 9 +-------- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 3 +-- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 5 ++--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 5 ++--- 6 files changed, 11 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 4e4b64821c9e..f3a37aa4d098 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -716,11 +716,8 @@ void dpu_crtc_commit_kickoff(struct drm_crtc *crtc, bool async) * may delay and flush at an irq event (e.g. ppdone) */ drm_for_each_encoder_mask(encoder, crtc->dev, - crtc->state->encoder_mask) { - struct dpu_encoder_kickoff_params params = { 0 }; - dpu_encoder_prepare_for_kickoff(encoder, ¶ms, async); - } - + crtc->state->encoder_mask) + dpu_encoder_prepare_for_kickoff(encoder, async); if (!async) { /* wait for frame_event_done completion */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 0dda4a603685..854c9efde8d1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1758,15 +1758,14 @@ static void dpu_encoder_vsync_event_work_handler(struct kthread_work *work) nsecs_to_jiffies(ktime_to_ns(wakeup_time))); } -void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, - struct dpu_encoder_kickoff_params *params, bool async) +void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, bool async) { struct dpu_encoder_virt *dpu_enc; struct dpu_encoder_phys *phys; bool needs_hw_reset = false; unsigned int i; - if (!drm_enc || !params) { + if (!drm_enc) { DPU_ERROR("invalid args\n"); return; } @@ -1780,7 +1779,7 @@ void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, phys = dpu_enc->phys_encs[i]; if (phys) { if (phys->ops.prepare_for_kickoff) - phys->ops.prepare_for_kickoff(phys, params); + phys->ops.prepare_for_kickoff(phys); if (phys->enable_state == DPU_ENC_ERR_NEEDS_HW_RESET) needs_hw_reset = true; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index 3f5dafe00580..0efe93ff7700 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -37,11 +37,6 @@ struct dpu_encoder_hw_resources { enum dpu_intf_mode intfs[INTF_MAX]; }; -/** - * dpu_encoder_kickoff_params - info encoder requires at kickoff - * @affected_displays: bitmask, bit set means the ROI of the commit lies within - * the bounds of the physical display at the bit index - */ struct dpu_encoder_kickoff_params { unsigned long affected_displays; }; @@ -88,11 +83,9 @@ void dpu_encoder_register_frame_event_callback(struct drm_encoder *encoder, * Immediately: if no previous commit is outstanding. * Delayed: Block until next trigger can be issued. * @encoder: encoder pointer - * @params: kickoff time parameters * @async: true if this is an asynchronous commit */ -void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder, - struct dpu_encoder_kickoff_params *params, bool async); +void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder, bool async); /** * dpu_encoder_trigger_kickoff_pending - Clear the flush bits from previous diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 44e6f8b68e70..db94f3d3bea3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -144,8 +144,7 @@ struct dpu_encoder_phys_ops { int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc); int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc); int (*wait_for_vblank)(struct dpu_encoder_phys *phys_enc); - void (*prepare_for_kickoff)(struct dpu_encoder_phys *phys_enc, - struct dpu_encoder_kickoff_params *params); + void (*prepare_for_kickoff)(struct dpu_encoder_phys *phys_enc); void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc); void (*trigger_start)(struct dpu_encoder_phys *phys_enc); bool (*needs_single_flush)(struct dpu_encoder_phys *phys_enc); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 99ab5ca9bed3..a399e1edd313 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -594,8 +594,7 @@ static void dpu_encoder_phys_cmd_get_hw_resources( } static void dpu_encoder_phys_cmd_prepare_for_kickoff( - struct dpu_encoder_phys *phys_enc, - struct dpu_encoder_kickoff_params *params) + struct dpu_encoder_phys *phys_enc) { struct dpu_encoder_phys_cmd *cmd_enc = to_dpu_encoder_phys_cmd(phys_enc); @@ -693,7 +692,7 @@ static int dpu_encoder_phys_cmd_wait_for_commit_done( /* required for both controllers */ if (!rc && cmd_enc->serialize_wait4pp) - dpu_encoder_phys_cmd_prepare_for_kickoff(phys_enc, NULL); + dpu_encoder_phys_cmd_prepare_for_kickoff(phys_enc); return rc; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index acdab5b0db18..3c4eb470a82c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -587,14 +587,13 @@ static int dpu_encoder_phys_vid_wait_for_vblank( } static void dpu_encoder_phys_vid_prepare_for_kickoff( - struct dpu_encoder_phys *phys_enc, - struct dpu_encoder_kickoff_params *params) + struct dpu_encoder_phys *phys_enc) { struct dpu_encoder_phys_vid *vid_enc; struct dpu_hw_ctl *ctl; int rc; - if (!phys_enc || !params) { + if (!phys_enc) { DPU_ERROR("invalid encoder/parameters\n"); return; }