Message ID | 20181228185307.25645-4-sibis@codeaurora.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v4,1/8] dt-bindings: soc: qcom: Add remote-pid binding for GLINK SMEM | expand |
diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 01be7314e176..cb5f0d3ac6a3 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -1398,13 +1398,16 @@ static const struct rproc_hexagon_res msm8996_mss = { .proxy_clk_names = (char*[]){ "xo", "pnoc", + "qdss", NULL }, .active_clk_names = (char*[]){ "iface", "bus", "mem", - "gpll0_mss_clk", + "gpll0_mss", + "snoc_axi", + "mnoc_axi", NULL }, .need_mem_protection = true,
Proxy vote for QDSS clock and remove vote on handover interrupt to provide MSS PBL with access to STM hardware registers during boot. Add "snoc_axi" and "mnoc_axi" to the active clock list. Rename "gpll0_mss_clk" to "gpll0_mss" for consistency across SoCs. Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc on msm8996") Signed-off-by: Sibi Sankar <sibis@codeaurora.org> --- v4: * Rename "gpll0_mss_clk" to "gpll0_mss" for consistency across SoCs drivers/remoteproc/qcom_q6v5_mss.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)