From patchwork Tue Jan 8 16:29:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 10752425 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0A68A6C5 for ; Tue, 8 Jan 2019 16:32:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED75528F3E for ; Tue, 8 Jan 2019 16:32:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EBC0028F4D; Tue, 8 Jan 2019 16:32:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 79BEE28E72 for ; Tue, 8 Jan 2019 16:32:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729644AbfAHQcS (ORCPT ); Tue, 8 Jan 2019 11:32:18 -0500 Received: from mail.kernel.org ([198.145.29.99]:39820 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729376AbfAHQcR (ORCPT ); Tue, 8 Jan 2019 11:32:17 -0500 Received: from localhost.localdomain (unknown [171.76.109.220]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id F1BAC20883; Tue, 8 Jan 2019 16:32:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1546965136; bh=GJrWXaDrF7MCrfR/he0FmFSyY/AYG7o5A3f5HPLA+LY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tEiH815ZwBrJGTN98YjzauSSNcQCcY5WGQQXQaLEfa1RuAEMtIWAsql5OOvi/hDfE wJaHJnxGrgXacgn4E0sElRtrEHBspJeOrxOAsRQba6BOAlB4S26mLtlQw15u5xnVzI DrP3hCZwge1f7t3PBkcwqHi4onS2VfCpytkilW4Y= From: Vinod Koul To: David S Miller Cc: netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, Niklas Cassel , Bjorn Andersson , Vinod Koul , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 1/5] dt-bindings: net: Add Qualcomm ethqos binding Date: Tue, 8 Jan 2019 21:59:22 +0530 Message-Id: <20190108162926.17806-2-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190108162926.17806-1-vkoul@kernel.org> References: <20190108162926.17806-1-vkoul@kernel.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add support for Qualcomm ethqos found in some SoCs like QCS404. Signed-off-by: Vinod Koul --- .../devicetree/bindings/net/qcom,dwmac.txt | 129 ++++++++++++++++++ 1 file changed, 129 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/qcom,dwmac.txt diff --git a/Documentation/devicetree/bindings/net/qcom,dwmac.txt b/Documentation/devicetree/bindings/net/qcom,dwmac.txt new file mode 100644 index 000000000000..652d2213c3ac --- /dev/null +++ b/Documentation/devicetree/bindings/net/qcom,dwmac.txt @@ -0,0 +1,129 @@ +Qualcomm Ethernet ETHQOS device + +This device has following properties: + +Required properties: + +- compatible: Should be qcom,ethqos-qcs404" + +- reg: Address and length of the register set for the device + +- reg-names: Should contain register names "stmmaceth", "rgmii" + +- clocks: Should contain phandle to clocks + +- clock-names: Should contain clock names "stmmaceth", "pclk", + "ptp_ref", "rgmii" + +- interrupts: Should contain phandle to interrupts + +- interrupt-names: Should contain interrupt names "macirq", "eth_lpi" + +Rest of the properties are defined in stmmac.txt file in same directory + + +Example: + +ethernet: ethernet@7a80000 { + compatible = "qcom,ethqos-qcs404"; + reg = <0x07a80000 0x10000>, + <0x07a96000 0x100>; + reg-names = "stmmaceth", "rgmii"; + clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii"; + clocks = <&gcc GCC_ETH_AXI_CLK>, + <&gcc GCC_ETH_SLAVE_AHB_CLK>, + <&gcc GCC_ETH_PTP_CLK>, + <&gcc GCC_ETH_RGMII_CLK>; + interrupts = , + ; + interrupt-names = "macirq", "eth_lpi"; + snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,axi-config = <&stmmac_axi_setup>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + + snps,txpbl = <8>; + snps,rxpbl = <2>; + snps,aal; + snps,tso; + + phy-handle = <&phy1>; + phy-mode = "rgmii"; + + stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <15>; + snps,rd_osr_lmt = <15>; + snps,blen = <256 128 64 32 0 0 0>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,priority = <0x0>; + }; + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,priority = <0x1>; + }; + queue2 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,priority = <0x1>; + }; + queue3 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0x1>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x0>; + }; + queue1 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + snps,priority = <0x1>; + }; + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + snps,priority = <0x1>; + }; + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3E800>; + snps,low_credit = <0xFFC18000>; + snps,priority = <0x1>; + }; + }; + + mdio { + #address-cells = <0x1>; + #size-cells = <0x0>; + compatible = "snps,dwmac-mdio"; + phy1: phy@4 { + device_type = "ethernet-phy"; + reg = <0x4>; + }; + }; + +};