From patchwork Thu Mar 21 17:17:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 10864115 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 72001139A for ; Thu, 21 Mar 2019 17:18:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4C83C2A064 for ; Thu, 21 Mar 2019 17:18:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 405EC2A3EF; Thu, 21 Mar 2019 17:18:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E081B2A3F0 for ; Thu, 21 Mar 2019 17:18:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728784AbfCURSY (ORCPT ); Thu, 21 Mar 2019 13:18:24 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:45560 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728777AbfCURSY (ORCPT ); Thu, 21 Mar 2019 13:18:24 -0400 Received: by mail-pg1-f195.google.com with SMTP id y3so4623049pgk.12 for ; Thu, 21 Mar 2019 10:18:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QhKCahgOarX4GDkR5QSVNqxMg4FAl0Xz9vcCv1+uBfE=; b=e7HGjSOLBUK8HUyErB1b0bO5zYYUaeBbO6f6RAOjLah7VvhMjDfLmiHyJ4QfbOd7RU medBnmXeDSOrpZNrgKVJkkGxav6VT+XuCvW4nz/LviRw5PfyuceirS3rVOysvlSKWwnS bSQF+KDLNcTkPovjGxVCBDUBtrGEk0qAjhvVo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QhKCahgOarX4GDkR5QSVNqxMg4FAl0Xz9vcCv1+uBfE=; b=DAiUoOYYqkm6jXdsUU9A4MW4jqwh7FRNjXu3UlCw1HGBQnpVrILIZmnsCOgS6fo+GZ 3jbCXevqiDcOEsFWWdrIBtRNN09fFIgNtJNaxji2taovSaZv5jYzc4BRaSwklZEjZtqS Iy28yp0uAKwkeVN2481HhNsKjmM+0Wbhs1slv7uezr8MApE53zRyfPBVoNWE/AC0Lsvt ssn5FNoYiVVblvFBZJnIIoe3Ah/+TMuEjOu52qtuCgS2JcFNtVfnNYoiJlQ26XgaTWIU 5X7oQaIfxilDcHOsNXW2kjqtC5I+VY3MeSl9fcDI2dI30edl6dpZpJIFGuN9aRNad346 XyVQ== X-Gm-Message-State: APjAAAXILI0hjHdOXvgKAmyAZWQFIT86sqHdlgEcruUMr3tALKPkBNsM QXyAXjC10yqIslkYT3WBuphqpg== X-Google-Smtp-Source: APXvYqxX0VrbWoT5JwygmTltad4nA6wGJ5vIDvwYoQBgStrNGIstUPO/lhz1A6BPQ3KO3mtfJ+yb5g== X-Received: by 2002:a17:902:bb94:: with SMTP id m20mr4674500pls.255.1553188702128; Thu, 21 Mar 2019 10:18:22 -0700 (PDT) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:ffda:7716:9afc:1301]) by smtp.gmail.com with ESMTPSA id z6sm20953866pgo.31.2019.03.21.10.18.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Mar 2019 10:18:21 -0700 (PDT) From: Evan Green To: Kishon Vijay Abraham I Cc: Stephen Boyd , Marc Gonzalez , Can Guo , Vivek Gautam , Douglas Anderson , Asutosh Das , Evan Green , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Rob Herring , David Brown , Mark Rutland Subject: [PATCH v5 4/8] arm64: dts: sdm845: Add UFS PHY reset Date: Thu, 21 Mar 2019 10:17:56 -0700 Message-Id: <20190321171800.104681-5-evgreen@chromium.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190321171800.104681-1-evgreen@chromium.org> References: <20190321171800.104681-1-evgreen@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Wire up the reset controller in the Qcom UFS controller for the PHY. This will be used to toggle PHY reset during initialization of the PHY. Signed-off-by: Evan Green Reviewed-by: Stephen Boyd --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 5308f1671824..66c77146585b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1033,6 +1033,7 @@ phy-names = "ufsphy"; lanes-per-direction = <2>; power-domains = <&gcc UFS_PHY_GDSC>; + #reset-cells = <1>; iommus = <&apps_smmu 0x100 0xf>; @@ -1078,6 +1079,8 @@ clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; status = "disabled"; ufs_mem_phy_lanes: lanes@1d87400 {