From patchwork Thu Mar 21 17:17:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Green X-Patchwork-Id: 10864129 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2B2E21515 for ; Thu, 21 Mar 2019 17:18:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 06E0029E65 for ; Thu, 21 Mar 2019 17:18:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EF8332A085; Thu, 21 Mar 2019 17:18:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A133029E65 for ; Thu, 21 Mar 2019 17:18:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728776AbfCURS0 (ORCPT ); Thu, 21 Mar 2019 13:18:26 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:43305 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728783AbfCURSZ (ORCPT ); Thu, 21 Mar 2019 13:18:25 -0400 Received: by mail-pg1-f194.google.com with SMTP id l11so4618430pgq.10 for ; Thu, 21 Mar 2019 10:18:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cDhjjnKzvciBPxRXKZr8yRdui7H/ilutHNcJeHVcKgI=; b=fIHNMaC8pGvkwOaoBEGA2ai2qQa3B9rXlzrmbPcvcpiuyiJjYWjemS5GcbLDv4kIqX UC7ufYVo9qSSo1rESa7Gg3z2tUnDljs56HM5euZnZlig49IY7IOvK73Vuc5ogRqXjcz7 rdAELindMhvI4k1AgS1DWppXriQeoMX8oAPNQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cDhjjnKzvciBPxRXKZr8yRdui7H/ilutHNcJeHVcKgI=; b=U3CP+gZnYP0PTMgSWP4wIZqqhLvz/1h406xbWYcxp07836sw5WRLTNsTHSmRLNYCcT vxVWur1KTZwjHOA9td7lAU3F4bf926RyVb6J5njwkU9WL8cI7trrGXzM3u4kYunrJy4d tnVsDtQXufearQ0iLcw8KfIUtp+7TUG+adY88nNTeL9SjmL9n5xiP65wJFf8Xt+Pcoq3 XGE0XrcqJWlhIICahbSoMVdSzLk9pCrkgqjKY/gfPGJI+kJHnFJzd0x7vdl6MgOuXt0W aVKoxWxcTuRnUQ4j37PruBQofeN48fss1L01rO4GGnufW02AXNzsOdORumznW6gnatC+ IBsg== X-Gm-Message-State: APjAAAUmLMO4FUkFSGn0cdRoafOddcaHJEEn79gnoUke6ke2+LoZr51G g+fcT3/5Nww8tNHcp6yw7G1y2g== X-Google-Smtp-Source: APXvYqwxhb6mZUoUO6R5/Lgjj1/wAv5hsGMB9kb1bL6lyz6TPrbafGmDcA0Sv9EbmeykDlW7rzfRpw== X-Received: by 2002:a17:902:2a89:: with SMTP id j9mr4540987plb.272.1553188704349; Thu, 21 Mar 2019 10:18:24 -0700 (PDT) Received: from evgreen2.mtv.corp.google.com ([2620:15c:202:201:ffda:7716:9afc:1301]) by smtp.gmail.com with ESMTPSA id z6sm20953866pgo.31.2019.03.21.10.18.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Mar 2019 10:18:23 -0700 (PDT) From: Evan Green To: Kishon Vijay Abraham I Cc: Stephen Boyd , Marc Gonzalez , Can Guo , Vivek Gautam , Douglas Anderson , Asutosh Das , Evan Green , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Gross , Rob Herring , David Brown , Mark Rutland Subject: [PATCH v5 5/8] arm64: dts: msm8996: Add UFS PHY reset controller Date: Thu, 21 Mar 2019 10:17:57 -0700 Message-Id: <20190321171800.104681-6-evgreen@chromium.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190321171800.104681-1-evgreen@chromium.org> References: <20190321171800.104681-1-evgreen@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the reset controller for the UFS controller, and wire it up so that the UFS PHY can initialize itself without relying on implicit sequencing between the two drivers. Signed-off-by: Evan Green Reviewed-by: Stephen Boyd --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c761269caf80..5683b727283e 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -697,10 +697,11 @@ clock-names = "ref_clk_src", "ref_clk"; clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, <&gcc GCC_UFS_CLKREF_CLK>; + resets = <&ufshc 0>; status = "disabled"; }; - ufshc@624000 { + ufshc: ufshc@624000 { compatible = "qcom,ufshc"; reg = <0x624000 0x2500>; interrupts = ; @@ -756,6 +757,7 @@ <0 0>; lanes-per-direction = <1>; + #reset-cells = <1>; status = "disabled"; ufs_variant {