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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id q21sm3449365lfa.84.2019.05.13.12.23.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 13 May 2019 12:23:31 -0700 (PDT) From: Ulf Hansson To: Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , linux-arm-kernel@lists.infradead.org Cc: "Rafael J . Wysocki" , Daniel Lezcano , "Raju P . L . S . S . S . N" , Amit Kucheria , Bjorn Andersson , Stephen Boyd , Niklas Cassel , Tony Lindgren , Kevin Hilman , Lina Iyer , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , Souvik Chakravarty , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Ulf Hansson Subject: [PATCH 14/18] drivers: firmware: psci: Manage runtime PM in the idle path for CPUs Date: Mon, 13 May 2019 21:22:56 +0200 Message-Id: <20190513192300.653-15-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190513192300.653-1-ulf.hansson@linaro.org> References: <20190513192300.653-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When the hierarchical CPU topology layout is used in DT, let's allow the CPU to be power managed through its PM domain, via deploying runtime PM support. To know for which idle states runtime PM reference counting is needed, let's store the index of deepest idle state for the CPU, in a per CPU variable. This allows psci_cpu_suspend_enter() to compare this index with the requested idle state index and then act accordingly. Signed-off-by: Ulf Hansson --- Changes: - Simplify the code by using the new per CPU struct, that stores the needed struct device*. --- drivers/firmware/psci/psci.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 54e23d4ed0ea..2c4157d3a616 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -298,6 +299,7 @@ static int __init psci_features(u32 psci_func_id) struct psci_cpuidle_data { u32 *psci_states; + u32 rpm_state_id; struct device *dev; }; @@ -385,6 +387,7 @@ static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, goto free_mem; data->dev = dev; + data->rpm_state_id = drv->state_count - 1; } /* Idle states parsed correctly, store them in the per-cpu struct. */ @@ -481,8 +484,11 @@ static int psci_suspend_finisher(unsigned long index) int psci_cpu_suspend_enter(unsigned long index) { int ret; - u32 *state = __this_cpu_read(psci_cpuidle_data.psci_states); - u32 composite_state = state[index - 1] | psci_get_domain_state(); + struct psci_cpuidle_data *data = this_cpu_ptr(&psci_cpuidle_data); + u32 *states = data->psci_states; + struct device *dev = data->dev; + bool runtime_pm = (dev && data->rpm_state_id == index); + u32 composite_state; /* * idle state index 0 corresponds to wfi, should never be called @@ -491,11 +497,23 @@ int psci_cpu_suspend_enter(unsigned long index) if (WARN_ON_ONCE(!index)) return -EINVAL; + /* + * Do runtime PM if we are using the hierarchical CPU toplogy, but only + * when cpuidle have selected the deepest idle state for the CPU. + */ + if (runtime_pm) + pm_runtime_put_sync_suspend(dev); + + composite_state = states[index - 1] | psci_get_domain_state(); + if (!psci_power_state_loses_context(composite_state)) ret = psci_ops.cpu_suspend(composite_state, 0); else ret = cpu_suspend(index, psci_suspend_finisher); + if (runtime_pm) + pm_runtime_get_sync(dev); + /* Clear the domain state to start fresh when back from idle. */ psci_set_domain_state(0);