From patchwork Mon Feb 10 21:39:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Leach X-Patchwork-Id: 11374097 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DC0C2109A for ; Mon, 10 Feb 2020 21:39:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BDAC8208C4 for ; Mon, 10 Feb 2020 21:39:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="xT+kKKEL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727522AbgBJVjy (ORCPT ); Mon, 10 Feb 2020 16:39:54 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:52280 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727496AbgBJVjy (ORCPT ); Mon, 10 Feb 2020 16:39:54 -0500 Received: by mail-wm1-f65.google.com with SMTP id p9so922819wmc.2 for ; Mon, 10 Feb 2020 13:39:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tDhVs6CVDINJ1HNHUEVGjWNjJ7PiR8LnUgb8ARuG2ic=; b=xT+kKKELUbYJEut1pXQy7yCr5Ba8DT9YY1HgCjYDCVFSD6pr5KA79OvmdnDq3uofkj rZpgOwWdBhnciXQHrI1HI5PkxvhDTLoTBzRScbO5b4RUg0F/mBT66mnLZPP6zXqtphcE 9vU1eXnyMLAjOsuubA0//KVHhkIBovp2kFJ2RA/mWXvG5dko3BRJmwKeZQhP+yisyeV2 YztfWVPSEIW1WG7hYvGsvnCK09zC6KwX2dyoZk/V+8mO62dBBHX76kqChxMiiw8etvLu WoRUUKBPwFj5nEnU70E2Qs3k0qoujxA541RxE2QzvKl4D98OO4Ya2A7J0UDyK9WOz8uO nV6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tDhVs6CVDINJ1HNHUEVGjWNjJ7PiR8LnUgb8ARuG2ic=; b=a2+K2/gz9QjEkpKyk4YOfy2g2TE1LugA+MVxOYvdTX1UJwvRejKDcQRIgwxKL/xLBm Fpk01sEzZkyKk2F4rEXVpRSdkB0h54evQDHWyX/qegCiGWI/9OMBxDO2/FhQkswF+YW5 PlEfs9HKaj1RODNE0oH//Bt6Q/NNlmrdFEH9x/D6wF/zdYcISjBDsriTd3vbpGv0WpXq UB9e/PXLvkJkb6MsNs+2MCo0D5oVmHaUJwqltY+qvPDrcA6ohOBPBFDE6Cp6gQHAe0/p eVH8omE/3eqfmaBTeg4ZjHilSXX/VcWU6Bu5A7aJQY8vefm7UR1Mlpg1bPglLuivMpsq RI3A== X-Gm-Message-State: APjAAAXfVuOU4aO3808FoONRFV3vG5nGLd6V0kEJntsCmY0QmXOdjElb lDM5WOdhKebAiLzQH4FKxo7QKA== X-Google-Smtp-Source: APXvYqzBk4sibp0ZgvWVehnTsFJQaapDP12tVYoo8hBhdeKSyN5u3j7vp41gG53snXnSV0Lyge618Q== X-Received: by 2002:a1c:b486:: with SMTP id d128mr1002803wmf.69.1581370792041; Mon, 10 Feb 2020 13:39:52 -0800 (PST) Received: from linaro.org ([2a00:23c5:6815:3901:a1cf:b00b:5683:ed40]) by smtp.gmail.com with ESMTPSA id u14sm2118582wrm.51.2020.02.10.13.39.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Feb 2020 13:39:51 -0800 (PST) From: Mike Leach To: mike.leach@linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, coresight@lists.linaro.org, linux-doc@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, mathieu.poirier@linaro.org, suzuki.poulose@arm.com, robh+dt@kernel.org, maxime@cerno.tech, liviu.dudau@arm.com, sudeep.holla@arm.com, lorenzo.pieralisi@arm.com, agross@kernel.org, corbet@lwn.net Subject: [PATCH v9 02/15] coresight: cti: Add sysfs coresight mgmt reg access. Date: Mon, 10 Feb 2020 21:39:11 +0000 Message-Id: <20200210213924.20037-3-mike.leach@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200210213924.20037-1-mike.leach@linaro.org> References: <20200210213924.20037-1-mike.leach@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Adds sysfs access to the coresight management registers. Signed-off-by: Mike Leach Reviewed-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose --- .../hwtracing/coresight/coresight-cti-sysfs.c | 53 +++++++++++++++++++ drivers/hwtracing/coresight/coresight-priv.h | 1 + 2 files changed, 54 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c index a832b8c6b866..507f8eb487fe 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -62,11 +62,64 @@ static struct attribute *coresight_cti_attrs[] = { NULL, }; +/* register based attributes */ + +/* macro to access RO registers with power check only (no enable check). */ +#define coresight_cti_reg(name, offset) \ +static ssize_t name##_show(struct device *dev, \ + struct device_attribute *attr, char *buf) \ +{ \ + struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); \ + u32 val = 0; \ + pm_runtime_get_sync(dev->parent); \ + spin_lock(&drvdata->spinlock); \ + if (drvdata->config.hw_powered) \ + val = readl_relaxed(drvdata->base + offset); \ + spin_unlock(&drvdata->spinlock); \ + pm_runtime_put_sync(dev->parent); \ + return scnprintf(buf, PAGE_SIZE, "0x%x\n", val); \ +} \ +static DEVICE_ATTR_RO(name) + +/* coresight management registers */ +coresight_cti_reg(devaff0, CTIDEVAFF0); +coresight_cti_reg(devaff1, CTIDEVAFF1); +coresight_cti_reg(authstatus, CORESIGHT_AUTHSTATUS); +coresight_cti_reg(devarch, CORESIGHT_DEVARCH); +coresight_cti_reg(devid, CORESIGHT_DEVID); +coresight_cti_reg(devtype, CORESIGHT_DEVTYPE); +coresight_cti_reg(pidr0, CORESIGHT_PERIPHIDR0); +coresight_cti_reg(pidr1, CORESIGHT_PERIPHIDR1); +coresight_cti_reg(pidr2, CORESIGHT_PERIPHIDR2); +coresight_cti_reg(pidr3, CORESIGHT_PERIPHIDR3); +coresight_cti_reg(pidr4, CORESIGHT_PERIPHIDR4); + +static struct attribute *coresight_cti_mgmt_attrs[] = { + &dev_attr_devaff0.attr, + &dev_attr_devaff1.attr, + &dev_attr_authstatus.attr, + &dev_attr_devarch.attr, + &dev_attr_devid.attr, + &dev_attr_devtype.attr, + &dev_attr_pidr0.attr, + &dev_attr_pidr1.attr, + &dev_attr_pidr2.attr, + &dev_attr_pidr3.attr, + &dev_attr_pidr4.attr, + NULL, +}; + static const struct attribute_group coresight_cti_group = { .attrs = coresight_cti_attrs, }; +static const struct attribute_group coresight_cti_mgmt_group = { + .attrs = coresight_cti_mgmt_attrs, + .name = "mgmt", +}; + const struct attribute_group *coresight_cti_groups[] = { &coresight_cti_group, + &coresight_cti_mgmt_group, NULL, }; diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 82e563cdc879..aba6b789c969 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -22,6 +22,7 @@ #define CORESIGHT_CLAIMCLR 0xfa4 #define CORESIGHT_LAR 0xfb0 #define CORESIGHT_LSR 0xfb4 +#define CORESIGHT_DEVARCH 0xfbc #define CORESIGHT_AUTHSTATUS 0xfb8 #define CORESIGHT_DEVID 0xfc8 #define CORESIGHT_DEVTYPE 0xfcc