Message ID | 20200314133600.183-1-ansuelsmth@gmail.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | [RESEND] ipq806x: gcc: Added the enable regs and mask for PRNG | expand |
Quoting Ansuel Smith (2020-03-14 06:36:00) > Kernel got hanged while reading from /dev/hwrng at the > time of PRNG clock enable Authorship is still wrong. There should be a From: Abhishek Sahu <absahu@codeaurora.org> line above this line. > > Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global > clock controller (GCC)" > > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > --- Also, please don't send as a reply to the older versions of this patch. It makes it harder to keep track of what is new and what isn't new and buries it deep in a thread for me.
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index b0eee0903807..a8456e09c44d 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -1224,6 +1224,8 @@ static struct clk_rcg prng_src = { .parent_map = gcc_pxo_pll8_map, }, .clkr = { + .enable_reg = 0x2e80, + .enable_mask = BIT(11), .hw.init = &(struct clk_init_data){ .name = "prng_src", .parent_names = gcc_pxo_pll8,