diff mbox series

[v6,5/5] cpufreq: qcom: Disable fast switch when scaling DDR/L3

Message ID 20200622081649.27280-6-sibis@codeaurora.org (mailing list archive)
State Accepted
Commit afdb219bab58dc2935e2c16adae2b2ce2a242386
Headers show
Series DDR/L3 Scaling support on SDM845 and SC7180 SoCs | expand

Commit Message

Sibi Sankar June 22, 2020, 8:16 a.m. UTC 
Disable fast switch when the opp-tables required for scaling DDR/L3
are populated.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
---

v7:
 * Picked up R-b from Matthias

v6:
 * No change

v5:
 * Drop dev_pm_opp_get_path_count [Saravana]

 drivers/cpufreq/qcom-cpufreq-hw.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
index aaf98333d37da..fa68fa8ebd95e 100644
--- a/drivers/cpufreq/qcom-cpufreq-hw.c
+++ b/drivers/cpufreq/qcom-cpufreq-hw.c
@@ -159,6 +159,7 @@  static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
 		dev_err(cpu_dev, "Invalid opp table in device tree\n");
 		return ret;
 	} else {
+		policy->fast_switch_possible = true;
 		icc_scaling_enabled = false;
 	}
 
@@ -308,8 +309,6 @@  static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
 
 	dev_pm_opp_of_register_em(policy->cpus);
 
-	policy->fast_switch_possible = true;
-
 	return 0;
 error:
 	devm_iounmap(dev, base);