| Message ID | 20200623180832.254163-4-konradybcio@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | SDM630 and Ninges fixes | expand |
On Tue, Jun 23, 2020 at 11:39 PM Konrad Dybcio <konradybcio@gmail.com> wrote: > > Enable tsens on this SoC using tsens-v2 driver. > > Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> > --- > .../devicetree/bindings/thermal/qcom-tsens.yaml | 1 + > arch/arm64/boot/dts/qcom/sdm630.dtsi | 11 +++++++++++ > 2 files changed, 12 insertions(+) > > diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml > index d7be931b42d2..d89d5acd6e2a 100644 > --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml > +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml > @@ -39,6 +39,7 @@ properties: > - qcom,msm8996-tsens > - qcom,msm8998-tsens > - qcom,sc7180-tsens > + - qcom,sdm630-tsens > - qcom,sdm845-tsens > - const: qcom,tsens-v2 > > diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi > index ea85f28032d2..92bf4ae6a590 100644 > --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi > @@ -566,6 +566,17 @@ anoc2_smmu: iommu@16c0000 { > <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; > }; > > + tsens: thermal-sensor@10ae000 { > + compatible = "qcom,sdm630-tsens", "qcom,tsens-v2"; > + reg = <0x010ae000 0x1000>, /* TM */ > + <0x010ad000 0x1000>; /* SROT */ > + #qcom,sensors = <12>; > + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "uplow", "critical"; > + #thermal-sensor-cells = <1>; > + }; > + There should be 2 tsens controllers on this platform, the first at 0x010AA000, the other at 0x010AD000. > tcsr_mutex_regs: syscon@1f40000 { > compatible = "syscon"; > reg = <0x01f40000 0x20000>; > -- > 2.27.0 >
Interesting, the downstream DTS only mentions the 0x010AD one.. Are you sure you're not looking at 636/660? Regards Konrad
On Wed, Jun 24, 2020 at 8:32 PM Konrad Dybcio <konradybcio@gmail.com> wrote: > > Interesting, the downstream DTS only mentions the 0x010AD one.. > Are you sure you're not looking at 636/660? > I looked a bit closer. So there are two instances of the controller but the platform doesn't have as many sensors. So using just one controller is fine. I suspect the other controller might be disabled in firmware. Regards, Amit
diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index d7be931b42d2..d89d5acd6e2a 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -39,6 +39,7 @@ properties: - qcom,msm8996-tsens - qcom,msm8998-tsens - qcom,sc7180-tsens + - qcom,sdm630-tsens - qcom,sdm845-tsens - const: qcom,tsens-v2 diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index ea85f28032d2..92bf4ae6a590 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -566,6 +566,17 @@ anoc2_smmu: iommu@16c0000 { <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; }; + tsens: thermal-sensor@10ae000 { + compatible = "qcom,sdm630-tsens", "qcom,tsens-v2"; + reg = <0x010ae000 0x1000>, /* TM */ + <0x010ad000 0x1000>; /* SROT */ + #qcom,sensors = <12>; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "uplow", "critical"; + #thermal-sensor-cells = <1>; + }; + tcsr_mutex_regs: syscon@1f40000 { compatible = "syscon"; reg = <0x01f40000 0x20000>;
Enable tsens on this SoC using tsens-v2 driver. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> --- .../devicetree/bindings/thermal/qcom-tsens.yaml | 1 + arch/arm64/boot/dts/qcom/sdm630.dtsi | 11 +++++++++++ 2 files changed, 12 insertions(+)