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[87.16.250.164]) by smtp.googlemail.com with ESMTPSA id e16sm2498260ejt.14.2020.07.09.14.51.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jul 2020 14:51:48 -0700 (PDT) From: Ansuel Smith To: Amit Kucheria Cc: Ansuel Smith , Andy Gross , Bjorn Andersson , Zhang Rui , Daniel Lezcano , Rob Herring , linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/6] dt-bindings: thermal: tsens: document ipq8064 bindings Date: Thu, 9 Jul 2020 23:51:33 +0200 Message-Id: <20200709215136.28044-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200709215136.28044-1-ansuelsmth@gmail.com> References: <20200709215136.28044-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the use of regmap phandle for ipq8064 SoCs Signed-off-by: Ansuel Smith --- .../bindings/thermal/qcom-tsens.yaml | 51 ++++++++++++++++--- 1 file changed, 44 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml index d7be931b42d2..5ceb5d720e16 100644 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -24,6 +24,7 @@ properties: - enum: - qcom,msm8916-tsens - qcom,msm8974-tsens + - qcom,ipq8064-tsens - const: qcom,tsens-v0_1 - description: v1 of TSENS @@ -47,6 +48,11 @@ properties: - description: TM registers - description: SROT registers + regmap: + description: + Phandle to the gcc. On ipq8064 SoCs gcc and tsense share the same regs. + $ref: /schemas/types.yaml#/definitions/phandle + interrupts: minItems: 1 items: @@ -111,17 +117,48 @@ allOf: interrupt-names: minItems: 2 -required: - - compatible - - reg - - "#qcom,sensors" - - interrupts - - interrupt-names - - "#thermal-sensor-cells" + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-tsens + then: + required: + - compatible + - regmap + - "#qcom,sensors" + - interrupts + - interrupt-names + - "#thermal-sensor-cells" + + else: + required: + - compatible + - reg + - "#qcom,sensors" + - interrupts + - interrupt-names + - "#thermal-sensor-cells" additionalProperties: false examples: + - | + #include + // Example msm9860 based SoC (ipq8064): + tsens: thermal-sensor@900000 { + compatible = "qcom,ipq8064-tsens"; + regmap = <&gcc>; + + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + + interrupts = ; + + #thermal-sensor-cells = <1>; + }; + - | #include // Example 1 (legacy: for pre v1 IP):