From patchwork Mon Aug 24 18:37:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 11734095 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AC63A138A for ; Mon, 24 Aug 2020 18:43:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 95DBF20866 for ; Mon, 24 Aug 2020 18:43:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="BBruHGtB" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727919AbgHXSnf (ORCPT ); Mon, 24 Aug 2020 14:43:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45250 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726630AbgHXSms (ORCPT ); Mon, 24 Aug 2020 14:42:48 -0400 Received: from mail-pf1-x444.google.com (mail-pf1-x444.google.com [IPv6:2607:f8b0:4864:20::444]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C92D0C061573; Mon, 24 Aug 2020 11:42:47 -0700 (PDT) Received: by mail-pf1-x444.google.com with SMTP id y206so5298215pfb.10; Mon, 24 Aug 2020 11:42:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VoyPgLas/EUNbQEYprU6PB/6pOwjqGOdvclKJYENFWw=; b=BBruHGtBthrICeIDAmBcG2uUZDAga6fYElXBdLKCXiubo2pm+Clq4l0xYdQxllzHlZ O1dEvgqwKFj7yXNvhVdTJp1iJfACtvlG1hG2CEjJrJx/MgOGaivSD1rwB/BOtNbV6G8t X7qXpLY4S4rHcndJPpVGd1ykSGB7CGr2NWYYQ8Hw7GQhOF2yUadBWzOAIAKmGlU+HvRb kWSoEsmXq0rXLnZ+0S+GGzejpk/rWa7nTAWNg7pzaeWW8S7EXNugQRuQ5JLQWdQS7GU7 KyLEhP5mQ2RRWky6HsetCY+36iGNWemPQ0SaCV0PIOgJf4SIiW3r4gXoxYQZzGumoRkY V0zQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VoyPgLas/EUNbQEYprU6PB/6pOwjqGOdvclKJYENFWw=; b=XSTG4kcEK6m9DgSpcoN+H+S+VG0TO8VonVdBfMe5D4jq3QhbqKLw0cV5/BJtWJvwNJ 0iFhRMN0TFeE+HcjOc8cy0fZGMO87q3+3LoJAgW+iGMr37Ler0hQ5G31KZoNkaGPS96V HDHEOzmcL7BNXjgBsg/+ANPsULKFlDmLW0Rq03oUFrkhy34R8CFkYZzGXAyZba3SztO/ EyGAfEkU1A+m/K5ygeJQA+3KbML4r4dBA81wTZJ/n3MMNusVfCUvIN3kJhIMe17zYjJU e7ZtGIZJn3t4H7YN0q+Bcnc0cPsupEJqIJbL6swQBqN0jbn/g3GNt1PoC/XClAp2MBdZ D7mg== X-Gm-Message-State: AOAM530M7u+wWQYkkA2I7/6P+/F1baTCJOqgD6umcJ/WCOMGlesk3HAG YL01tIlbSwP9zu0j4Jda/CU= X-Google-Smtp-Source: ABdhPJxJ4hmtCta+hX6LVQdC4pLmXOKC1elcyxC0dRNkBQOWIoyBQV4I+BUW2VaWyulJogf1gbaeSg== X-Received: by 2002:a63:9041:: with SMTP id a62mr3624236pge.273.1598294567247; Mon, 24 Aug 2020 11:42:47 -0700 (PDT) Received: from localhost ([2601:1c0:5200:a6:307:a401:7b76:c6e5]) by smtp.gmail.com with ESMTPSA id y65sm12063114pfb.155.2020.08.24.11.42.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Aug 2020 11:42:46 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org Cc: Sai Prakash Ranjan , Will Deacon , freedreno@lists.freedesktop.org, Bjorn Andersson , Sibi Sankar , Vivek Gautam , Stephen Boyd , Robin Murphy , Joerg Roedel , Rob Clark , Akhil P Oommen , AngeloGioacchino Del Regno , Ben Dooks , Brian Masney , Eric Anholt , Joerg Roedel , John Stultz , Jonathan Marek , Jordan Crouse , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Fabio Estevam , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 13/20] drm/msm: Set the global virtual address range from the IOMMU domain Date: Mon, 24 Aug 2020 11:37:47 -0700 Message-Id: <20200824183825.1778810-14-robdclark@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200824183825.1778810-1-robdclark@gmail.com> References: <20200824183825.1778810-1-robdclark@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jordan Crouse Use the aperture settings from the IOMMU domain to set up the virtual address range for the GPU. This allows us to transparently deal with IOMMU side features (like split pagetables). Signed-off-by: Jordan Crouse Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 13 +++++++++++-- drivers/gpu/drm/msm/msm_iommu.c | 7 +++++++ 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 533a34b4cce2..34e6242c1767 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -192,9 +192,18 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, struct iommu_domain *iommu = iommu_domain_alloc(&platform_bus_type); struct msm_mmu *mmu = msm_iommu_new(&pdev->dev, iommu); struct msm_gem_address_space *aspace; + u64 start, size; - aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M, - 0xffffffff - SZ_16M); + /* + * Use the aperture start or SZ_16M, whichever is greater. This will + * ensure that we align with the allocated pagetable range while still + * allowing room in the lower 32 bits for GMEM and whatnot + */ + start = max_t(u64, SZ_16M, iommu->geometry.aperture_start); + size = iommu->geometry.aperture_end - start + 1; + + aspace = msm_gem_address_space_create(mmu, "gpu", + start & GENMASK(48, 0), size); if (IS_ERR(aspace) && !IS_ERR(mmu)) mmu->funcs->destroy(mmu); diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c index 3a381a9674c9..1b6635504069 100644 --- a/drivers/gpu/drm/msm/msm_iommu.c +++ b/drivers/gpu/drm/msm/msm_iommu.c @@ -36,6 +36,10 @@ static int msm_iommu_map(struct msm_mmu *mmu, uint64_t iova, struct msm_iommu *iommu = to_msm_iommu(mmu); size_t ret; + /* The arm-smmu driver expects the addresses to be sign extended */ + if (iova & BIT_ULL(48)) + iova |= GENMASK_ULL(63, 49); + ret = iommu_map_sg(iommu->domain, iova, sgt->sgl, sgt->nents, prot); WARN_ON(!ret); @@ -46,6 +50,9 @@ static int msm_iommu_unmap(struct msm_mmu *mmu, uint64_t iova, size_t len) { struct msm_iommu *iommu = to_msm_iommu(mmu); + if (iova & BIT_ULL(48)) + iova |= GENMASK_ULL(63, 49); + iommu_unmap(iommu->domain, iova, len); return 0;