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[178.169.161.196]) by smtp.gmail.com with ESMTPSA id w15sm14985282wro.46.2020.09.20.07.50.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 20 Sep 2020 07:50:17 -0700 (PDT) From: Iskren Chernev To: Rob Herring Cc: Andy Gross , Bjorn Andersson , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, Iskren Chernev Subject: [PATCH RESEND 7/7] ARM: dts: qcom: msm8974-klte: Add support for SD card Date: Sun, 20 Sep 2020 17:48:59 +0300 Message-Id: <20200920144859.813032-8-iskren.chernev@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200920144859.813032-1-iskren.chernev@gmail.com> References: <20200920144859.813032-1-iskren.chernev@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The Samsung Galaxy S5 (klte), has 3 SDHCI nodes used for internal storage, WiFi, external SD card slot. The external SD card slot is similar to the internal storage. Signed-off-by: Iskren Chernev --- .../boot/dts/qcom-msm8974-samsung-klte.dts | 44 ++++++++++++++++++- 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts index 989447beb4319..b0899107f3ced 100644 --- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts +++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts @@ -12,6 +12,8 @@ / { aliases { serial0 = &blsp1_uart1; + sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ + sdhc2 = &sdhc_2; /* SDC2 SD card slot */ }; chosen { @@ -161,6 +163,9 @@ pma8084_l20: l20 { pma8084_l21: l21 { regulator-min-microvolt = <2950000>; regulator-max-microvolt = <2950000>; + + regulator-allow-set-load; + regulator-system-load = <200000>; }; pma8084_l22: l22 { @@ -349,6 +354,24 @@ cmd-data { }; }; + sdhc2_pin_a: sdhc2-pin-active { + clk-cmd-data { + pins = "gpio35", "gpio36", "gpio37", "gpio38", + "gpio39", "gpio40"; + function = "sdc3"; + drive-strength = <8>; + bias-disable; + }; + }; + + sdhc2_cd_pin: sdhc2-cd { + pins = "gpio62"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; + sdhc3_pin_a: sdhc3-pin-active { clk { pins = "sdc2_clk"; @@ -422,7 +445,7 @@ int { }; }; - sdhci@f9824900 { + sdhc_1: sdhci@f9824900 { status = "ok"; vmmc-supply = <&pma8084_l20>; @@ -435,6 +458,25 @@ sdhci@f9824900 { pinctrl-0 = <&sdhc1_pin_a>; }; + sdhc_2: sdhci@f9864900 { + status = "ok"; + + max-frequency = <100000000>; + + vmmc-supply = <&pma8084_l21>; + vqmmc-supply = <&pma8084_l13>; + + bus-width = <4>; + + /* cd-gpio is intentionally disabled. If enabled, an SD card + * present during boot is not initialized correctly. Without + * cd-gpios the driver resorts to polling, so hotplug works. + */ + pinctrl-names = "default"; + pinctrl-0 = <&sdhc2_pin_a /* &sdhc2_cd_pin */>; + // cd-gpios = <&msmgpio 62 GPIO_ACTIVE_LOW>; + }; + sdhci@f98a4900 { status = "okay";