| Message ID | 20210322165405.44980-1-andriy.shevchenko@linux.intel.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v1,1/1] i2c: drivers: Use generic definitions for bus frequencies (part 2) | expand |
Thanks. Acked-by: Khalil Blaiech <kblaiech@nvidia.com> > -----Original Message----- > From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Sent: Monday, March 22, 2021 12:54 PM > To: Wolfram Sang <wsa@kernel.org>; Khalil Blaiech <kblaiech@nvidia.com>; > Loic Poulain <loic.poulain@linaro.org>; linux-i2c@vger.kernel.org; linux- > kernel@vger.kernel.org; linux-arm-msm@vger.kernel.org > Cc: Robert Foss <robert.foss@linaro.org>; Andy Shevchenko > <andriy.shevchenko@linux.intel.com>; Wolfram Sang <wsa@the- > dreams.de> > Subject: [PATCH v1 1/1] i2c: drivers: Use generic definitions for bus > frequencies (part 2) > > Since we have generic definitions for bus frequencies, let's use them. > > Cc: Wolfram Sang <wsa@the-dreams.de> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > --- > drivers/i2c/busses/i2c-mlxbf.c | 14 ++++---------- > drivers/i2c/busses/i2c-qcom-cci.c | 4 ++-- > 2 files changed, 6 insertions(+), 12 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c > index 2fb0532d8a16..80ab831df349 100644 > --- a/drivers/i2c/busses/i2c-mlxbf.c > +++ b/drivers/i2c/busses/i2c-mlxbf.c > @@ -172,12 +172,6 @@ > #define MLXBF_I2C_SMBUS_THIGH_MAX_TBUF 0x14 > #define MLXBF_I2C_SMBUS_SCL_LOW_TIMEOUT 0x18 > > -enum { > - MLXBF_I2C_TIMING_100KHZ = 100000, > - MLXBF_I2C_TIMING_400KHZ = 400000, > - MLXBF_I2C_TIMING_1000KHZ = 1000000, > -}; > - > /* > * Defines SMBus operating frequency and core clock frequency. > * According to ADB files, default values are compliant to 100KHz SMBus > @@ -1202,7 +1196,7 @@ static int mlxbf_i2c_init_timings(struct > platform_device *pdev, > > ret = device_property_read_u32(dev, "clock-frequency", > &config_khz); > if (ret < 0) > - config_khz = MLXBF_I2C_TIMING_100KHZ; > + config_khz = I2C_MAX_STANDARD_MODE_FREQ; > > switch (config_khz) { > default: > @@ -1210,15 +1204,15 @@ static int mlxbf_i2c_init_timings(struct > platform_device *pdev, > pr_warn("Illegal value %d: defaulting to 100 KHz\n", > config_khz); > fallthrough; > - case MLXBF_I2C_TIMING_100KHZ: > + case I2C_MAX_STANDARD_MODE_FREQ: > config_idx = MLXBF_I2C_TIMING_CONFIG_100KHZ; > break; > > - case MLXBF_I2C_TIMING_400KHZ: > + case I2C_MAX_FAST_MODE_FREQ: > config_idx = MLXBF_I2C_TIMING_CONFIG_400KHZ; > break; > > - case MLXBF_I2C_TIMING_1000KHZ: > + case I2C_MAX_FAST_MODE_PLUS_FREQ: > config_idx = MLXBF_I2C_TIMING_CONFIG_1000KHZ; > break; > } > diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom- > cci.c > index 1c259b5188de..c63d5545fc2a 100644 > --- a/drivers/i2c/busses/i2c-qcom-cci.c > +++ b/drivers/i2c/busses/i2c-qcom-cci.c > @@ -569,9 +569,9 @@ static int cci_probe(struct platform_device *pdev) > cci->master[idx].mode = I2C_MODE_STANDARD; > ret = of_property_read_u32(child, "clock-frequency", &val); > if (!ret) { > - if (val == 400000) > + if (val == I2C_MAX_FAST_MODE_FREQ) > cci->master[idx].mode = I2C_MODE_FAST; > - else if (val == 1000000) > + else if (val == I2C_MAX_FAST_MODE_PLUS_FREQ) > cci->master[idx].mode = > I2C_MODE_FAST_PLUS; > } > > -- > 2.30.2
diff --git a/drivers/i2c/busses/i2c-mlxbf.c b/drivers/i2c/busses/i2c-mlxbf.c index 2fb0532d8a16..80ab831df349 100644 --- a/drivers/i2c/busses/i2c-mlxbf.c +++ b/drivers/i2c/busses/i2c-mlxbf.c @@ -172,12 +172,6 @@ #define MLXBF_I2C_SMBUS_THIGH_MAX_TBUF 0x14 #define MLXBF_I2C_SMBUS_SCL_LOW_TIMEOUT 0x18 -enum { - MLXBF_I2C_TIMING_100KHZ = 100000, - MLXBF_I2C_TIMING_400KHZ = 400000, - MLXBF_I2C_TIMING_1000KHZ = 1000000, -}; - /* * Defines SMBus operating frequency and core clock frequency. * According to ADB files, default values are compliant to 100KHz SMBus @@ -1202,7 +1196,7 @@ static int mlxbf_i2c_init_timings(struct platform_device *pdev, ret = device_property_read_u32(dev, "clock-frequency", &config_khz); if (ret < 0) - config_khz = MLXBF_I2C_TIMING_100KHZ; + config_khz = I2C_MAX_STANDARD_MODE_FREQ; switch (config_khz) { default: @@ -1210,15 +1204,15 @@ static int mlxbf_i2c_init_timings(struct platform_device *pdev, pr_warn("Illegal value %d: defaulting to 100 KHz\n", config_khz); fallthrough; - case MLXBF_I2C_TIMING_100KHZ: + case I2C_MAX_STANDARD_MODE_FREQ: config_idx = MLXBF_I2C_TIMING_CONFIG_100KHZ; break; - case MLXBF_I2C_TIMING_400KHZ: + case I2C_MAX_FAST_MODE_FREQ: config_idx = MLXBF_I2C_TIMING_CONFIG_400KHZ; break; - case MLXBF_I2C_TIMING_1000KHZ: + case I2C_MAX_FAST_MODE_PLUS_FREQ: config_idx = MLXBF_I2C_TIMING_CONFIG_1000KHZ; break; } diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c index 1c259b5188de..c63d5545fc2a 100644 --- a/drivers/i2c/busses/i2c-qcom-cci.c +++ b/drivers/i2c/busses/i2c-qcom-cci.c @@ -569,9 +569,9 @@ static int cci_probe(struct platform_device *pdev) cci->master[idx].mode = I2C_MODE_STANDARD; ret = of_property_read_u32(child, "clock-frequency", &val); if (!ret) { - if (val == 400000) + if (val == I2C_MAX_FAST_MODE_FREQ) cci->master[idx].mode = I2C_MODE_FAST; - else if (val == 1000000) + else if (val == I2C_MAX_FAST_MODE_PLUS_FREQ) cci->master[idx].mode = I2C_MODE_FAST_PLUS; }
Since we have generic definitions for bus frequencies, let's use them. Cc: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- drivers/i2c/busses/i2c-mlxbf.c | 14 ++++---------- drivers/i2c/busses/i2c-qcom-cci.c | 4 ++-- 2 files changed, 6 insertions(+), 12 deletions(-)