| Message ID | 20210901183123.1087392-4-angelogioacchino.delregno@somainline.org (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [1/5] arm64: dts: msm8998: Configure the MultiMedia Clock Controller (MMCC) | expand |
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 625d0fd7e33d..221dc61ca5e3 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -867,14 +867,14 @@ rpm_msg_ram: memory@778000 { reg = <0x00778000 0x7000>; }; - qfprom: qfprom@780000 { + qfprom: qfprom@784000 { compatible = "qcom,qfprom"; - reg = <0x00780000 0x621c>; + reg = <0x00784000 0x621c>; #address-cells = <1>; #size-cells = <1>; - qusb2_hstx_trim: hstx-trim@423a { - reg = <0x423a 0x1>; + qusb2_hstx_trim: hstx-trim@23a { + reg = <0x23a 0x1>; bits = <0 4>; }; };
The QFPROM iospace was (erroneously, I believe) set to the uncalibrated fuse start address, but every driver only needs - and will always only need - only calibrated values. Move the iospace forward to the calibrated values start to avoid offsetting every fuse definition. Obviously, the only defined fuse (qusb2_hstx_trim) was also fixed to remove the offset, in order to comply with this change. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)