From patchwork Sun Sep 26 19:06:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yassine Oudjana X-Patchwork-Id: 12518425 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 585A7C433F5 for ; Sun, 26 Sep 2021 19:06:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 41E586056B for ; Sun, 26 Sep 2021 19:06:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229919AbhIZTIU (ORCPT ); Sun, 26 Sep 2021 15:08:20 -0400 Received: from mail-4318.protonmail.ch ([185.70.43.18]:18699 "EHLO mail-4318.protonmail.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229916AbhIZTIU (ORCPT ); Sun, 26 Sep 2021 15:08:20 -0400 Date: Sun, 26 Sep 2021 19:06:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail; t=1632683201; bh=VOvK+zw4WxW2VQY2O6xUBaEP2ZuDPG5wlMplcLzQD0I=; h=Date:To:From:Cc:Reply-To:Subject:In-Reply-To:References:From; b=axk8KETmOlJn4UQoCYissiIfV9MtzMCBMiLIhSYQY25/EPcOuFwJIFhg7c8owyTc2 XvoUinvdPSMb/SoZciOYWYNqTdw1pHY56IFJhoFJuPtvQLpGvFptIIHY3jOIN5ZUsi kNZwNrtjGCZEYuTtT/e+2g9bLKJmXPbGRcHfGUTw= To: Andy Gross , Bjorn Andersson , Ohad Ben-Cohen , Mathieu Poirier , Rob Herring From: Yassine Oudjana Cc: Yassine Oudjana , AngeloGioacchino Del Regno , Konrad Dybcio , Raffaele Tranquillini , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, phone-devel@vger.kernel.org, linux-kernel@vger.kernel.org Reply-To: Yassine Oudjana Subject: [PATCH v2 4/5] arm64: dts: qcom: msm8996: Add MSS and SLPI Message-ID: <20210926190555.278589-5-y.oudjana@protonmail.com> In-Reply-To: <20210926190555.278589-1-y.oudjana@protonmail.com> References: <20210926190555.278589-1-y.oudjana@protonmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add nodes for the MSS and SLPI remoteprocs. Signed-off-by: Yassine Oudjana Tested-by: Dmitry Baryshkov #db820c --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 99 +++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 7710ca6f3374..1301ffcf588b 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2103,6 +2103,105 @@ lpass_q6_smmu: iommu@1600000 { clock-names = "iface", "bus"; }; + slpi_pil: remoteproc@1c00000 { + compatible = "qcom,msm8996-slpi-pil"; + reg = <0x01c00000 0x4000>; + + interrupts-extended = <&intc 0 390 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks = <&xo_board>, + <&rpmcc RPM_SMD_AGGR2_NOC_CLK>; + clock-names = "xo", "aggre2"; + + memory-region = <&slpi_mem>; + + qcom,smem-states = <&slpi_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + power-domains = <&rpmpd MSM8996_VDDSSCX>; + power-domain-names = "ssc_cx"; + + status = "disabled"; + + smd-edge { + interrupts = ; + + label = "dsps"; + mboxes = <&apcs_glb 25>; + qcom,smd-edge = <3>; + qcom,remote-pid = <3>; + }; + }; + + mss_pil: remoteproc@2080000 { + compatible = "qcom,msm8996-mss-pil"; + reg = <0x2080000 0x100>, + <0x2180000 0x020>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc 0 448 IRQ_TYPE_EDGE_RISING>, + <&mpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&mpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&mpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&mpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&mpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", + "shutdown-ack"; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&xo_board>, + <&gcc GCC_MSS_GPLL0_DIV_CLK>, + <&gcc GCC_MSS_SNOC_AXI_CLK>, + <&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>, + <&rpmcc RPM_SMD_PCNOC_CLK>, + <&rpmcc RPM_SMD_QDSS_CLK>; + clock-names = "iface", "bus", "mem", "xo", "gpll0_mss", + "snoc_axi", "mnoc_axi", "pnoc", "qdss"; + + resets = <&gcc GCC_MSS_RESTART>; + reset-names = "mss_restart"; + + power-domains = <&rpmpd MSM8996_VDDCX>, + <&rpmpd MSM8996_VDDMX>; + power-domain-names = "cx", "mx"; + + qcom,smem-states = <&mpss_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; + + status = "disabled"; + + mba { + memory-region = <&mba_mem>; + }; + + mpss { + memory-region = <&mpss_mem>; + }; + + smd-edge { + interrupts = ; + + label = "mpss"; + mboxes = <&apcs_glb 12>; + qcom,smd-edge = <0>; + qcom,remote-pid = <1>; + }; + }; + stm@3002000 { compatible = "arm,coresight-stm", "arm,primecell"; reg = <0x3002000 0x1000>,