From patchwork Thu Dec 2 22:27:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 12653593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F222C4332F for ; Thu, 2 Dec 2021 22:28:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377492AbhLBWbz (ORCPT ); Thu, 2 Dec 2021 17:31:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377365AbhLBWbc (ORCPT ); Thu, 2 Dec 2021 17:31:32 -0500 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3323C06174A for ; Thu, 2 Dec 2021 14:27:52 -0800 (PST) Received: by mail-pl1-x633.google.com with SMTP id v19so739147plo.7 for ; Thu, 02 Dec 2021 14:27:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0P0B2t7jpcQb6RReBEhUJcwiQBX6wggU1M1usRBo/kI=; b=MJAsiBHpO2q/hsdSciuVFwOT83PxpG9KpLTTD6y0Jx+32jDfUTd5R+reXnN94kI7HS GgGdo4Mh4lZoXjrW/jAhRMOM4ufPOdIVKUiioIwtOhV78I9fsMuFVoRq2DG3CtFH2zh0 FkzOE9NnxFQxGfNLVwIhT2jCD7yS3hFy2CGxc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0P0B2t7jpcQb6RReBEhUJcwiQBX6wggU1M1usRBo/kI=; b=MwNcSytP+1Q31LdUZRb5IW18Lw+IcjpTEPyjLqruirzQKvZMYBGerazwhszP6xRzop 4wPsaEhJLo8I8Fog0IpeCLhjKQc98HXfB5Rl1ooNv6f9/ZXSVulBPohsiuYjldRYfl2e YnUbNKbUsf2hdMYQq8sLMza5zU0jCxapDADyDniG05Wgmibg7tj6TWK4+yig/KpB3LGl aQksnQwuaIcarAUPq4nuJ2e1LZdMzZr462yPFR30h2adIsBCInU3k3mxjl3Rx5qqr5YU OVHPxG8h35GGCBRV1aeI8YX/b3BNCACZrjWv1SmONqh9KCcAl9k0NVQ9VhNrVfkaz4TU QgRA== X-Gm-Message-State: AOAM530tU2ateVUhYta93tcW+2Ib1KcfNZ4SITTmbQx4TbXrKWzo+nKP G+SD6eULC4HdUWb4GHK96B6FFA== X-Google-Smtp-Source: ABdhPJzRLHHfwflAzf8KYyKYQgwlkeL0VlCcI9nc3Zp0HIXLhrAJVU/FYievGfLqo9GNTzZdkvDo5Q== X-Received: by 2002:a17:902:c7c2:b0:143:bdf7:1670 with SMTP id r2-20020a170902c7c200b00143bdf71670mr18130203pla.61.1638484072251; Thu, 02 Dec 2021 14:27:52 -0800 (PST) Received: from smtp.gmail.com ([2620:15c:202:201:f4f2:1b7e:5aea:bf3c]) by smtp.gmail.com with ESMTPSA id q9sm836934pfj.9.2021.12.02.14.27.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Dec 2021 14:27:51 -0800 (PST) From: Stephen Boyd To: Greg Kroah-Hartman Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Neil Armstrong , Daniel Vetter , "Rafael J. Wysocki" , Rob Clark , Russell King , Saravana Kannan Subject: [PATCH v4 19/34] drm/meson: Migrate to aggregate driver Date: Thu, 2 Dec 2021 14:27:17 -0800 Message-Id: <20211202222732.2453851-20-swboyd@chromium.org> X-Mailer: git-send-email 2.34.0.384.gca35af8252-goog In-Reply-To: <20211202222732.2453851-1-swboyd@chromium.org> References: <20211202222732.2453851-1-swboyd@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use an aggregate driver instead of component ops so that we can get proper driver probe ordering of the aggregate device with respect to all the component devices that make up the aggregate device. Cc: Neil Armstrong Cc: Daniel Vetter Cc: "Rafael J. Wysocki" Cc: Rob Clark Cc: Russell King Cc: Saravana Kannan Signed-off-by: Stephen Boyd --- drivers/gpu/drm/meson/meson_drv.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c index 7f41a33592c8..3028f2a45f66 100644 --- a/drivers/gpu/drm/meson/meson_drv.c +++ b/drivers/gpu/drm/meson/meson_drv.c @@ -356,13 +356,16 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) return ret; } -static int meson_drv_bind(struct device *dev) +static int meson_drv_bind(struct aggregate_device *adev) { + struct device *dev = adev->parent; + return meson_drv_bind_master(dev, true); } -static void meson_drv_unbind(struct device *dev) +static void meson_drv_unbind(struct aggregate_device *adev) { + struct device *dev = adev->parent; struct meson_drm *priv = dev_get_drvdata(dev); struct drm_device *drm = priv->drm; @@ -386,9 +389,13 @@ static void meson_drv_unbind(struct device *dev) } } -static const struct component_master_ops meson_drv_master_ops = { - .bind = meson_drv_bind, - .unbind = meson_drv_unbind, +static struct aggregate_driver meson_aggregate_drv = { + .probe = meson_drv_bind, + .remove = meson_drv_unbind, + .driver = { + .name = "meson_drm", + .owner = THIS_MODULE, + }, }; static int __maybe_unused meson_drv_pm_suspend(struct device *dev) @@ -502,9 +509,7 @@ static int meson_drv_probe(struct platform_device *pdev) if (count) { dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); - return component_master_add_with_match(&pdev->dev, - &meson_drv_master_ops, - match); + return component_aggregate_register(&pdev->dev, &meson_aggregate_drv, match); } /* If no output endpoints were available, simply bail out */