| Message ID | 20220210173100.505128-1-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | b77d8306d84f83d1da68028a68c91da9c867b6f6 |
| Headers | show |
| Series | clk: qcom: ipq8074: Use floor ops for SDCC1 clock | expand |
Quoting Robert Marko (2022-02-10 09:31:00) > From: Dirk Buchwalder <buchwalder@posteo.de> > > Use floor ops on SDCC1 APPS clock in order to round down selected clock > frequency and avoid overclocking SD/eMMC cards. > > For example, currently HS200 cards were failling tuning as they were > actually being clocked at 384MHz instead of 192MHz. > This caused some boards to disable 1.8V I/O and force the eMMC into the > standard HS mode (50MHz) and that appeared to work despite the eMMC being > overclocked to 96Mhz in that case. > > There was a previous commit to use floor ops on SDCC clocks, but it looks > to have only covered SDCC2 clock. > > Fixes: 9607f6224b39 ("clk: qcom: ipq8074: add PCIE, USB and SDCC clocks") > > Signed-off-by: Dirk Buchwalder <buchwalder@posteo.de> > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Hello: This patch was applied to qcom/linux.git (for-next) by Bjorn Andersson <bjorn.andersson@linaro.org>: On Thu, 10 Feb 2022 18:31:00 +0100 you wrote: > From: Dirk Buchwalder <buchwalder@posteo.de> > > Use floor ops on SDCC1 APPS clock in order to round down selected clock > frequency and avoid overclocking SD/eMMC cards. > > For example, currently HS200 cards were failling tuning as they were > actually being clocked at 384MHz instead of 192MHz. > This caused some boards to disable 1.8V I/O and force the eMMC into the > standard HS mode (50MHz) and that appeared to work despite the eMMC being > overclocked to 96Mhz in that case. > > [...] Here is the summary with links: - clk: qcom: ipq8074: Use floor ops for SDCC1 clock https://git.kernel.org/qcom/c/b77d8306d84f You are awesome, thank you!
On Thu, 10 Feb 2022 18:31:00 +0100, Robert Marko wrote: > From: Dirk Buchwalder <buchwalder@posteo.de> > > Use floor ops on SDCC1 APPS clock in order to round down selected clock > frequency and avoid overclocking SD/eMMC cards. > > For example, currently HS200 cards were failling tuning as they were > actually being clocked at 384MHz instead of 192MHz. > This caused some boards to disable 1.8V I/O and force the eMMC into the > standard HS mode (50MHz) and that appeared to work despite the eMMC being > overclocked to 96Mhz in that case. > > [...] Applied, thanks! [1/1] clk: qcom: ipq8074: Use floor ops for SDCC1 clock commit: b77d8306d84f83d1da68028a68c91da9c867b6f6 Best regards,
diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c index 1e493f19fa44..c24e33321f72 100644 --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c @@ -1074,7 +1074,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = { .name = "sdcc1_apps_clk_src", .parent_names = gcc_xo_gpll0_gpll2_gpll0_out_main_div2, .num_parents = 4, - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, };