diff mbox series

[4/5] irqchip/qcom-pdc: Fix broken locking

Message ID 20220224101226.88373-5-maz@kernel.org (mailing list archive)
State Not Applicable
Headers show
Series irqchip/qcom-pdc: Assorted cleanups and fixes | expand

Commit Message

Marc Zyngier Feb. 24, 2022, 10:12 a.m. UTC
pdc_enable_intr() serves as a primitive to qcom_pdc_gic_{en,dis}able,
and has a raw spinlock for mutual exclusion, which is uses with
interruptible primitives.

This means that this critical section can itself be interrupted.
Should the interrupt also be a PDC interrupt, and the endpoint driver
perform an irq_disable() on that interrupt, we end-up in a deadlock.

Fix this by using the irqsave/irqrestore variants of the locking
primitives.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 drivers/irqchip/qcom-pdc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Maulik Shah Feb. 28, 2022, 7:30 p.m. UTC | #1
Hi,

On 2/24/2022 3:42 PM, Marc Zyngier wrote:
> pdc_enable_intr() serves as a primitive to qcom_pdc_gic_{en,dis}able,
> and has a raw spinlock for mutual exclusion, which is uses with
> interruptible primitives.
>
> This means that this critical section can itself be interrupted.
> Should the interrupt also be a PDC interrupt, and the endpoint driver
> perform an irq_disable() on that interrupt, we end-up in a deadlock.
>
> Fix this by using the irqsave/irqrestore variants of the locking
> primitives.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Maulik Shah <quic_mkshah@quicinc.com>

Thanks,
Maulik
> ---
>   drivers/irqchip/qcom-pdc.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
>
>
diff mbox series

Patch

diff --git a/drivers/irqchip/qcom-pdc.c b/drivers/irqchip/qcom-pdc.c
index 837ca6998f6a..0cd20ddfae2a 100644
--- a/drivers/irqchip/qcom-pdc.c
+++ b/drivers/irqchip/qcom-pdc.c
@@ -55,17 +55,18 @@  static u32 pdc_reg_read(int reg, u32 i)
 static void pdc_enable_intr(struct irq_data *d, bool on)
 {
 	int pin_out = d->hwirq;
+	unsigned long flags;
 	u32 index, mask;
 	u32 enable;
 
 	index = pin_out / 32;
 	mask = pin_out % 32;
 
-	raw_spin_lock(&pdc_lock);
+	raw_spin_lock_irqsave(&pdc_lock, flags);
 	enable = pdc_reg_read(IRQ_ENABLE_BANK, index);
 	enable = on ? ENABLE_INTR(enable, mask) : CLEAR_INTR(enable, mask);
 	pdc_reg_write(IRQ_ENABLE_BANK, index, enable);
-	raw_spin_unlock(&pdc_lock);
+	raw_spin_unlock_irqrestore(&pdc_lock, flags);
 }
 
 static void qcom_pdc_gic_disable(struct irq_data *d)