| Message ID | 20220419062952.356017-1-judyhsiao@chromium.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [v1] ASoC: qcom: Use MCLK as RT5682I-VS sysclk source | expand |
On Tue, 19 Apr 2022 14:29:52 +0800, Judy Hsiao wrote: > Both MCLK and BCLK can be the clock source of sysclk via PLL > according to its datasheet. > This patch sets MCLK as the clock source as we use MCLK in the > previous projects. > > Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next Thanks! [1/1] ASoC: qcom: Use MCLK as RT5682I-VS sysclk source commit: 4d9596d42152bfd4a57cc317acf9cd0b90769033 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/sound/soc/qcom/sc7280.c b/sound/soc/qcom/sc7280.c index 4ef4034ba6ee..dfcb7ed44331 100644 --- a/sound/soc/qcom/sc7280.c +++ b/sound/soc/qcom/sc7280.c @@ -21,7 +21,7 @@ #include "lpass.h" #define DEFAULT_MCLK_RATE 19200000 -#define RT5682_PLL1_FREQ (48000 * 512) +#define RT5682_PLL_FREQ (48000 * 512) struct sc7280_snd_data { struct snd_soc_card card; @@ -137,15 +137,15 @@ static int sc7280_rt5682_init(struct snd_soc_pcm_runtime *rtd) SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_I2S); - ret = snd_soc_dai_set_pll(codec_dai, RT5682S_PLL1, RT5682S_PLL_S_BCLK1, - 1536000, RT5682_PLL1_FREQ); + ret = snd_soc_dai_set_pll(codec_dai, RT5682S_PLL2, RT5682S_PLL_S_MCLK, + DEFAULT_MCLK_RATE, RT5682_PLL_FREQ); if (ret) { dev_err(rtd->dev, "can't set codec pll: %d\n", ret); return ret; } - ret = snd_soc_dai_set_sysclk(codec_dai, RT5682S_SCLK_S_PLL1, - RT5682_PLL1_FREQ, + ret = snd_soc_dai_set_sysclk(codec_dai, RT5682S_SCLK_S_PLL2, + RT5682_PLL_FREQ, SND_SOC_CLOCK_IN); if (ret) {
Both MCLK and BCLK can be the clock source of sysclk via PLL according to its datasheet. This patch sets MCLK as the clock source as we use MCLK in the previous projects. Fixes: c5198db82d4c ("ASoC: qcom: Add driver support for ALC5682I-VS") Signed-off-by: Judy Hsiao <judyhsiao@chromium.org> --- sound/soc/qcom/sc7280.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)