Message ID | 20220503024349.4486-1-slark_xiao@163.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | [v2] bus: mhi: host: Add support for Foxconn T99W373 and T99W368 | expand |
On Tue, 3 May 2022 at 05:03, Slark Xiao <slark_xiao@163.com> wrote: > > Product's enumeration align with previous Foxconn > SDX55, so T99W373(SDX62)/T99W368(SDX65) would use > the same config as Foxconn SDX55. > Remove fw and edl for this new commit. > > Signed-off-by: Slark Xiao <slark_xiao@163.com> > Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Loic Poulain <loic.poulain@linaro.org>
On Tue, May 03, 2022 at 10:43:49AM +0800, Slark Xiao wrote: > Product's enumeration align with previous Foxconn > SDX55, so T99W373(SDX62)/T99W368(SDX65) would use > the same config as Foxconn SDX55. > Remove fw and edl for this new commit. > > Signed-off-by: Slark Xiao <slark_xiao@163.com> > Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Applied to mhi-next! Thanks, Mani > --- > drivers/bus/mhi/host/pci_generic.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c > index 24c94c23d78b..6fbc5915ea36 100644 > --- a/drivers/bus/mhi/host/pci_generic.c > +++ b/drivers/bus/mhi/host/pci_generic.c > @@ -371,6 +371,15 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = { > .sideband_wake = false, > }; > > +static const struct mhi_pci_dev_info mhi_foxconn_sdx65_info = { > + .name = "foxconn-sdx65", > + .config = &modem_foxconn_sdx55_config, > + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > + .dma_data_width = 32, > + .mru_default = 32768, > + .sideband_wake = false, > +}; > + > static const struct mhi_channel_config mhi_mv3x_channels[] = { > MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0), > MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0), > @@ -560,6 +569,12 @@ static const struct pci_device_id mhi_pci_id_table[] = { > /* T99W175 (sdx55), Based on Qualcomm new baseline */ > { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0bf), > .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info }, > + /* T99W368 (sdx65) */ > + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0d8), > + .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info }, > + /* T99W373 (sdx62) */ > + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0d9), > + .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info }, > /* MV31-W (Cinterion) */ > { PCI_DEVICE(0x1269, 0x00b3), > .driver_data = (kernel_ulong_t) &mhi_mv31_info }, > -- > 2.25.1 >
diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index 24c94c23d78b..6fbc5915ea36 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -371,6 +371,15 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = { .sideband_wake = false, }; +static const struct mhi_pci_dev_info mhi_foxconn_sdx65_info = { + .name = "foxconn-sdx65", + .config = &modem_foxconn_sdx55_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .mru_default = 32768, + .sideband_wake = false, +}; + static const struct mhi_channel_config mhi_mv3x_channels[] = { MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0), MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0), @@ -560,6 +569,12 @@ static const struct pci_device_id mhi_pci_id_table[] = { /* T99W175 (sdx55), Based on Qualcomm new baseline */ { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0bf), .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info }, + /* T99W368 (sdx65) */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0d8), + .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info }, + /* T99W373 (sdx62) */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0d9), + .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info }, /* MV31-W (Cinterion) */ { PCI_DEVICE(0x1269, 0x00b3), .driver_data = (kernel_ulong_t) &mhi_mv31_info },