From patchwork Tue Jul 5 09:42:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 12906241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08C75CCA47F for ; Tue, 5 Jul 2022 09:49:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231461AbiGEJtI (ORCPT ); Tue, 5 Jul 2022 05:49:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38582 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229972AbiGEJtF (ORCPT ); Tue, 5 Jul 2022 05:49:05 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B74538A1; Tue, 5 Jul 2022 02:49:04 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0F28661923; Tue, 5 Jul 2022 09:49:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BE5E7C341F5; Tue, 5 Jul 2022 09:49:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657014542; bh=2VcuM8Vri842hdse/qdcecrlmVet6SIPn9+HK5HWkgs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uCfFqFVgBky6NWH8beKPRZlWoXpu41m9QvxPuLSVLK8LR6C39bAYoIToUPibuIL7p 0r4nInVxw6oNStV1NqXFNlNqqJ1Th7pw1foVOfvyzhNfcO2glMtQHvDvkI4BOqq6Ph 6lMR7qPYKlvQ7M+GYhIHIgDhsRbaiSWVzI9Jl/oT3+GbRTgkNlcZuORhPZqnzYwjqU aF6OjK5Vv+fnOj4gH1K/P3IH7NMCl7fuv3wDllhPHhc1wmTtjjEeOlJLWwnFeoAzvU 0HTzyFoiNSmmy2meKaQ0W39CdhhTr67NC/2h870BV8ylxdtX4XBsfR6S13TlBFp5m1 MZnh5J2GA9k/Q== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o8fB1-0004XO-K3; Tue, 05 Jul 2022 11:49:03 +0200 From: Johan Hovold To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: Andy Gross , Bjorn Andersson , Kishon Vijay Abraham I , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 12/43] dt-bindings: phy: qcom,qmp: split out PCIe PHY binding Date: Tue, 5 Jul 2022 11:42:08 +0200 Message-Id: <20220705094239.17174-13-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220705094239.17174-1-johan+linaro@kernel.org> References: <20220705094239.17174-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The QMP PHY DT schema is getting unwieldy. Break out the PCIe PHY binding in a separate file. Signed-off-by: Johan Hovold --- .../bindings/phy/qcom,qmp-pcie-phy.yaml | 188 ++++++++++++++++++ .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 75 ------- 2 files changed, 188 insertions(+), 75 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml new file mode 100644 index 000000000000..d1d4a468acc3 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-pcie-phy.yaml @@ -0,0 +1,188 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Qualcomm QMP PHY controller (PCIe) + +maintainers: + - Vinod Koul + +description: + QMP PHY controller supports physical layer functionality for a number of + controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB. + +properties: + compatible: + enum: + - qcom,ipq6018-qmp-pcie-phy + - qcom,ipq8074-qmp-pcie-phy + - qcom,msm8998-qmp-pcie-phy + - qcom,sc8180x-qmp-pcie-phy + - qcom,sdm845-qhp-pcie-phy + - qcom,sdm845-qmp-pcie-phy + - qcom,sdx55-qmp-pcie-phy + - qcom,sm8250-qmp-gen3x1-pcie-phy + - qcom,sm8250-qmp-gen3x2-pcie-phy + - qcom,sm8250-qmp-modem-pcie-phy + - qcom,sm8450-qmp-gen3x1-pcie-phy + - qcom,sm8450-qmp-gen4x2-pcie-phy + + reg: + minItems: 1 + items: + - description: Address and length of PHY's common serdes block. + - description: Address and length of PHY's DP_COM control block. + + "#address-cells": + enum: [ 1, 2 ] + + "#size-cells": + enum: [ 1, 2 ] + + ranges: true + + clocks: + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 + + resets: + minItems: 1 + maxItems: 3 + + reset-names: + minItems: 1 + maxItems: 3 + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + + vddp-ref-clk-supply: + description: + Phandle to a regulator supply to any specific refclk pll block. + +patternProperties: + "^phy@[0-9a-f]+$": + type: object + description: + Each device node of QMP PHY is required to have as many child nodes as + the number of lanes the PHY has. + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8998-qmp-pcie-phy + then: + properties: + clocks: + items: + - description: PHY aux clock. + - description: PHY config clock. + - description: 19.2 MHz ref clock. + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + resets: + items: + - description: Reset of PHY block. + - description: PHY common block reset. + reset-names: + items: + - const: phy + - const: common + required: + - vdda-phy-supply + - vdda-pll-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-qmp-pcie-phy + - qcom,ipq8074-qmp-pcie-phy + then: + properties: + clocks: + items: + - description: PHY aux clock. + - description: PHY config clock. + clock-names: + items: + - const: aux + - const: cfg_ahb + resets: + items: + - description: Reset of PHY block. + - description: PHY common block reset. + reset-names: + items: + - const: phy + - const: common + + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8180x-qmp-pcie-phy + - qcom,sdm845-qhp-pcie-phy + - qcom,sdm845-qmp-pcie-phy + - qcom,sdx55-qmp-pcie-phy + - qcom,sm8250-qmp-gen3x1-pcie-phy + - qcom,sm8250-qmp-gen3x2-pcie-phy + - qcom,sm8250-qmp-modem-pcie-phy + - qcom,sm8450-qmp-gen3x1-pcie-phy + - qcom,sm8450-qmp-gen4x2-pcie-phy + then: + properties: + clocks: + items: + - description: PHY aux clock. + - description: PHY config clock. + - description: 19.2 MHz ref clock. + - description: PHY refgen clock. + clock-names: + items: + - const: aux + - const: cfg_ahb + - const: ref + - const: refgen + resets: + items: + - description: Reset of PHY block. + reset-names: + items: + - const: phy + required: + - vdda-phy-supply + - vdda-pll-supply diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml index 7a76fd286cee..f416a1a53a3f 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml @@ -17,27 +17,20 @@ description: properties: compatible: enum: - - qcom,ipq6018-qmp-pcie-phy - qcom,ipq6018-qmp-usb3-phy - - qcom,ipq8074-qmp-pcie-phy - qcom,ipq8074-qmp-usb3-phy - qcom,msm8996-qmp-ufs-phy - qcom,msm8996-qmp-usb3-phy - - qcom,msm8998-qmp-pcie-phy - qcom,msm8998-qmp-ufs-phy - qcom,msm8998-qmp-usb3-phy - qcom,qcm2290-qmp-usb3-phy - qcom,sc7180-qmp-usb3-phy - - qcom,sc8180x-qmp-pcie-phy - qcom,sc8180x-qmp-ufs-phy - qcom,sc8180x-qmp-usb3-phy - qcom,sc8280xp-qmp-ufs-phy - - qcom,sdm845-qhp-pcie-phy - - qcom,sdm845-qmp-pcie-phy - qcom,sdm845-qmp-ufs-phy - qcom,sdm845-qmp-usb3-phy - qcom,sdm845-qmp-usb3-uni-phy - - qcom,sdx55-qmp-pcie-phy - qcom,sdx55-qmp-usb3-uni-phy - qcom,sdx65-qmp-usb3-uni-phy - qcom,sm6115-qmp-ufs-phy @@ -45,17 +38,12 @@ properties: - qcom,sm8150-qmp-ufs-phy - qcom,sm8150-qmp-usb3-phy - qcom,sm8150-qmp-usb3-uni-phy - - qcom,sm8250-qmp-gen3x1-pcie-phy - - qcom,sm8250-qmp-gen3x2-pcie-phy - - qcom,sm8250-qmp-modem-pcie-phy - qcom,sm8250-qmp-ufs-phy - qcom,sm8250-qmp-usb3-phy - qcom,sm8250-qmp-usb3-uni-phy - qcom,sm8350-qmp-ufs-phy - qcom,sm8350-qmp-usb3-phy - qcom,sm8350-qmp-usb3-uni-phy - - qcom,sm8450-qmp-gen3x1-pcie-phy - - qcom,sm8450-qmp-gen4x2-pcie-phy - qcom,sm8450-qmp-ufs-phy - qcom,sm8450-qmp-usb3-phy @@ -190,7 +178,6 @@ allOf: enum: - qcom,ipq8074-qmp-usb3-phy - qcom,msm8996-qmp-usb3-phy - - qcom,msm8998-qmp-pcie-phy - qcom,msm8998-qmp-usb3-phy then: properties: @@ -269,68 +256,6 @@ allOf: required: - vdda-phy-supply - vdda-pll-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,ipq6018-qmp-pcie-phy - - qcom,ipq8074-qmp-pcie-phy - then: - properties: - clocks: - items: - - description: PHY aux clock. - - description: PHY config clock. - clock-names: - items: - - const: aux - - const: cfg_ahb - resets: - items: - - description: Reset of PHY block. - - description: PHY common block reset. - reset-names: - items: - - const: phy - - const: common - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8180x-qmp-pcie-phy - - qcom,sdm845-qhp-pcie-phy - - qcom,sdm845-qmp-pcie-phy - - qcom,sdx55-qmp-pcie-phy - - qcom,sm8250-qmp-gen3x1-pcie-phy - - qcom,sm8250-qmp-gen3x2-pcie-phy - - qcom,sm8250-qmp-modem-pcie-phy - - qcom,sm8450-qmp-gen3x1-pcie-phy - - qcom,sm8450-qmp-gen4x2-pcie-phy - then: - properties: - clocks: - items: - - description: PHY aux clock. - - description: PHY config clock. - - description: 19.2 MHz ref clock. - - description: PHY refgen clock. - clock-names: - items: - - const: aux - - const: cfg_ahb - - const: ref - - const: refgen - resets: - items: - - description: Reset of PHY block. - reset-names: - items: - - const: phy - required: - - vdda-phy-supply - - vdda-pll-supply - if: properties: compatible: