From patchwork Thu Jul 7 01:09:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 12908976 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 939C1C433EF for ; Thu, 7 Jul 2022 01:10:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234705AbiGGBKV (ORCPT ); Wed, 6 Jul 2022 21:10:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234611AbiGGBKQ (ORCPT ); Wed, 6 Jul 2022 21:10:16 -0400 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 489632E683; Wed, 6 Jul 2022 18:10:15 -0700 (PDT) Received: by mail-ej1-x635.google.com with SMTP id q6so29796845eji.13; Wed, 06 Jul 2022 18:10:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DqA/PYcFjqc35dtwpOSvvpQVHjaEPTenZ8v5MpUqkpE=; b=XNWD1s6HrVpg1euEQFIBPPVSvsoa4PfWYMidItBPykvKxpfzYMc7+vULRUW+vT6UgZ 7rqb3i/Y0ICNm4r4wTWyjgs2dGsUILsQERDDcMolVJ6azEsZB22NcXZuSrt45ivwuhu1 8m+HREp+yVRjDuxg82XCWDOXGyCSMWzyHJG0YKkehJckNAsew5TDWzOeRyqayq/zqcYk OkRSZKkEhVQpa2R4vyMhbbJy4wfx2Eg4015RQDFM/z2J6IqxTV/xVVtnRTQ11p+riJ8C O4eJPwz+hgI6kXnfUNoPRjWBpqVjxrBosc3yYPlSnL3kctHPcAA3llkc3U+w5C1BSdih qfEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DqA/PYcFjqc35dtwpOSvvpQVHjaEPTenZ8v5MpUqkpE=; b=Oqj4BLMcf9IG0eeUfw/KSXk8twKF6Z69jYK7U3G6TYhMVlSr3cnsbpfDUQvw6Il7tV wG25HYGgAXFRpT6R4Iemaybze5epE+3i+YrTSQFKfwEnork7DQf7gqibLQmL6YhT9Mhi OQ26+mbGGNpRNOz0CJPjEggBKslmU60sJBs6hVbJ+b8LcPOHUwIeWHMg/eUFV9Nz0/oC OgOTIN+xfWNIYnbB36PiXik7cWdw+MKsOQ/u3ieQAUp2ndV3f42fIZ1bHuOMJP0qd9AS n63jdXbpUh9KxmkzDgn0kCJHwG6robC9Nuxyjw4JEFls5lyCfqFjaKkNzJKRIZT6/bbZ Sibw== X-Gm-Message-State: AJIora8ueD7+q+elNFjTXlb409yZSP5U/gtlXUJPeeXQHwtx70Xp9ul6 zkbduaCmfJqkkyfx61hU3LzZQZ3SISQ= X-Google-Smtp-Source: AGRyM1vRlf71nDSp0AeuPEQOj5EdTIakkESFyMNewE4EARiDUmc8l5w/9d/QFV3JAKwJgs8QBad1gQ== X-Received: by 2002:a17:907:6e1b:b0:72a:f376:34de with SMTP id sd27-20020a1709076e1b00b0072af37634demr7714625ejc.320.1657156213782; Wed, 06 Jul 2022 18:10:13 -0700 (PDT) Received: from localhost.localdomain (93-42-70-190.ip85.fastwebnet.it. [93.42.70.190]) by smtp.googlemail.com with ESMTPSA id u17-20020a056402111100b0043a6e807febsm6915464edv.46.2022.07.06.18.10.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Jul 2022 18:10:13 -0700 (PDT) From: Christian Marangi To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Christian Marangi , Jonathan McDowell Subject: [PATCH v2 8/8] ARM: dts: qcom: add speedbin efuse nvmem node Date: Thu, 7 Jul 2022 03:09:43 +0200 Message-Id: <20220707010943.20857-10-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220707010943.20857-1-ansuelsmth@gmail.com> References: <20220707010943.20857-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add speedbin efuse nvmem cell needed for the opp table for the CPU freqs. Signed-off-by: Christian Marangi Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 69cf664851c6..71572028bc36 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -854,6 +854,9 @@ qfprom: qfprom@700000 { reg = <0x00700000 0x1000>; #address-cells = <1>; #size-cells = <1>; + speedbin_efuse: speedbin@c0 { + reg = <0xc0 0x4>; + }; tsens_calib: calib@400 { reg = <0x400 0xb>; };