From patchwork Mon Jul 11 16:30:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nathan Chancellor X-Patchwork-Id: 12914021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67801C433EF for ; Mon, 11 Jul 2022 16:30:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231895AbiGKQax (ORCPT ); Mon, 11 Jul 2022 12:30:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231938AbiGKQav (ORCPT ); Mon, 11 Jul 2022 12:30:51 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E768C4198C; Mon, 11 Jul 2022 09:30:49 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 3B4D1CE157F; Mon, 11 Jul 2022 16:30:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AFE84C34115; Mon, 11 Jul 2022 16:30:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657557046; bh=7ys5DT5LCo4Aok86zE8TUi4FZO1ZJabIQ/9L+8kOfnA=; h=From:To:Cc:Subject:Date:From; b=B5nvxvLkr5analne4pcAsLvy47vA10xyIdIuXIaeYQ8DMr63M8PTcGl+P31+cl0JF ZGH0J6ZJUpsk+Jh3kf8Pvg2X/wuMWFt4ypm5s/+U4UAVOU1sEtlRcZAhy2zLRMmFqy J/M4aNdWOw7GmhlS6WrTzXbIoJr5P5xxgy1pFd+k3aO+ondwbDghSI0TQL8vzJAKpb o1gSEVGOZevToclf+pvCJMc/Yk9vhO6vjcrMe8S4ldfcHkjOYblbUAr3TprIem5T4J mT4ukJq3M1aDDK6xQ7corz6dbtaFM2MUi23GWH3AC5q5z6otAFX+LW2A1zsacgVBn2 Fa6lso6NwmHCA== From: Nathan Chancellor To: Andy Gross , Bjorn Andersson Cc: Konrad Dybcio , Michael Turquette , Stephen Boyd , Nick Desaulniers , Tom Rix , Robert Foss , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, llvm@lists.linux.dev, Nathan Chancellor , kernel test robot Subject: [PATCH] clk: qcom: gpucc-sm8350: Fix "initializer element is not constant" error Date: Mon, 11 Jul 2022 09:30:21 -0700 Message-Id: <20220711163021.152578-1-nathan@kernel.org> X-Mailer: git-send-email 2.37.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When building with clang or GCC older than 8, errors along the following lines occur: drivers/clk/qcom/gpucc-sm8350.c:111:2: error: initializer element is not a compile-time constant gpu_cc_parent, ^~~~~~~~~~~~~ drivers/clk/qcom/gpucc-sm8350.c:126:2: error: initializer element is not a compile-time constant gpu_cc_parent, ^~~~~~~~~~~~~ 2 errors generated. The C standard allows an implementation to accept other forms of constant expressions, which GCC 8+ has chosen to do, but it is not required. To fix this error with clang and older supported versions of GCC, use a macro so that the expression can be used in a designated initializer. Fixes: 160758b05ab1 ("clk: qcom: add support for SM8350 GPUCC") Link: https://github.com/ClangBuiltLinux/linux/issues/1660 Reported-by: kernel test robot Signed-off-by: Nathan Chancellor --- drivers/clk/qcom/gpucc-sm8350.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) base-commit: 0dd8e16bfbc003b009f843e75fae4046daa08fe9 diff --git a/drivers/clk/qcom/gpucc-sm8350.c b/drivers/clk/qcom/gpucc-sm8350.c index d13fa813d190..9390723f6e40 100644 --- a/drivers/clk/qcom/gpucc-sm8350.c +++ b/drivers/clk/qcom/gpucc-sm8350.c @@ -51,9 +51,9 @@ static const struct alpha_pll_config gpu_cc_pll0_config = { .user_ctl_hi1_val = 0x00000000, }; -static const struct clk_parent_data gpu_cc_parent = { - .fw_name = "bi_tcxo", -}; +#define GPU_CC_PARENT_INIT { .fw_name = "bi_txco", } + +static const struct clk_parent_data gpu_cc_parent = GPU_CC_PARENT_INIT; static struct clk_alpha_pll gpu_cc_pll0 = { .offset = 0x0, @@ -108,7 +108,7 @@ static const struct parent_map gpu_cc_parent_map_0[] = { }; static const struct clk_parent_data gpu_cc_parent_data_0[] = { - gpu_cc_parent, + GPU_CC_PARENT_INIT, { .hw = &gpu_cc_pll0.clkr.hw }, { .hw = &gpu_cc_pll1.clkr.hw }, { .fw_name = "gcc_gpu_gpll0_clk_src" }, @@ -123,7 +123,7 @@ static const struct parent_map gpu_cc_parent_map_1[] = { }; static const struct clk_parent_data gpu_cc_parent_data_1[] = { - gpu_cc_parent, + GPU_CC_PARENT_INIT, { .hw = &gpu_cc_pll1.clkr.hw }, { .fw_name = "gcc_gpu_gpll0_clk_src" }, { .fw_name = "gcc_gpu_gpll0_div_clk_src" },