diff mbox series

dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos

Message ID 20220921153155.279182-1-ahalaney@redhat.com (mailing list archive)
State Accepted
Headers show
Series dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos | expand

Commit Message

Andrew Halaney Sept. 21, 2022, 3:31 p.m. UTC 
pipegmux and SuperSpeed are the proper spelling for those terms.

Signed-off-by: Andrew Halaney <ahalaney@redhat.com>
---
 .../devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml          | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Krzysztof Kozlowski Sept. 21, 2022, 3:48 p.m. UTC | #1 
On 21/09/2022 17:31, Andrew Halaney wrote:
> pipegmux and SuperSpeed are the proper spelling for those terms.
> 
> Signed-off-by: Andrew Halaney <ahalaney@redhat.com>


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Bjorn Andersson Sept. 28, 2022, 3:49 a.m. UTC | #2 
On Wed, 21 Sep 2022 10:31:56 -0500, Andrew Halaney wrote:
> pipegmux and SuperSpeed are the proper spelling for those terms.
> 
> 

Applied, thanks!

[1/1] dt-bindings: clocks: qcom,gcc-sc8280xp: Fix typos
      commit: 6632a6adae86265ca79cefc0e48e4a672a1108df

Best regards,
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml
index e33dea86fb9e..b1bf768530a3 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml
@@ -33,7 +33,7 @@  properties:
       - description: Primary USB SuperSpeed pipe clock
       - description: USB4 PHY pipegmux clock source
       - description: USB4 PHY DP gmux clock source
-      - description: USB4 PHY sys piegmux clock source
+      - description: USB4 PHY sys pipegmux clock source
       - description: USB4 PHY PCIe pipe clock
       - description: USB4 PHY router max pipe clock
       - description: Primary USB4 RX0 clock
@@ -46,7 +46,7 @@  properties:
       - description: Second USB4 PHY router max pipe clock
       - description: Secondary USB4 RX0 clock
       - description: Secondary USB4 RX1 clock
-      - description: Multiport USB first SupserSpeed pipe clock
+      - description: Multiport USB first SuperSpeed pipe clock
       - description: Multiport USB second SuperSpeed pipe clock
       - description: PCIe 2a pipe clock
       - description: PCIe 2b pipe clock