Message ID | 20221030094258.486428-8-iskren.chernev@gmail.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 70f18c6313622380f7b9452f31a93aec3e525f64 |
Headers | show |
Series | Add support for sm6115,4250 and OnePlus Nord N100 | expand |
On 30.10.2022 10:42, Iskren Chernev wrote: > The SM4250 is a downclocked version of the SM6115. > > Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Konrad > arch/arm64/boot/dts/qcom/sm4250.dtsi | 38 ++++++++++++++++++++++++++++ > 1 file changed, 38 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/sm4250.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi > new file mode 100644 > index 000000000000..c5add8f44fc0 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi > @@ -0,0 +1,38 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) > +/* > + * Copyright (c) 2021, Iskren Chernev <iskren.chernev@gmail.com> > + */ > + > +#include "sm6115.dtsi" > + > +&CPU0 { > + compatible = "qcom,kryo240"; > +}; > + > +&CPU1 { > + compatible = "qcom,kryo240"; > +}; > + > +&CPU2 { > + compatible = "qcom,kryo240"; > +}; > + > +&CPU3 { > + compatible = "qcom,kryo240"; > +}; > + > +&CPU4 { > + compatible = "qcom,kryo240"; > +}; > + > +&CPU5 { > + compatible = "qcom,kryo240"; > +}; > + > +&CPU6 { > + compatible = "qcom,kryo240"; > +}; > + > +&CPU7 { > + compatible = "qcom,kryo240"; > +};
diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi new file mode 100644 index 000000000000..c5add8f44fc0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (c) 2021, Iskren Chernev <iskren.chernev@gmail.com> + */ + +#include "sm6115.dtsi" + +&CPU0 { + compatible = "qcom,kryo240"; +}; + +&CPU1 { + compatible = "qcom,kryo240"; +}; + +&CPU2 { + compatible = "qcom,kryo240"; +}; + +&CPU3 { + compatible = "qcom,kryo240"; +}; + +&CPU4 { + compatible = "qcom,kryo240"; +}; + +&CPU5 { + compatible = "qcom,kryo240"; +}; + +&CPU6 { + compatible = "qcom,kryo240"; +}; + +&CPU7 { + compatible = "qcom,kryo240"; +};