| Message ID | 20221111032515.3460-7-quic_bjorande@quicinc.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | interconnect: osm-l3: SC8280XP L3 and DDR scaling | expand |
On 11/11/22 08:55, Bjorn Andersson wrote: > Update all references to OSM or EPSS L3 compatibles, to include the > generic compatible, as defined by the updated binding. > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > Tested-by: Steev Klimaszewski <steev@kali.org> > --- > > Changes since v1: > - None > > arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- > arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- > arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- > 5 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index ea886cf08b4d..f71cf21a8dd8 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -3558,7 +3558,7 @@ > }; > > osm_l3: interconnect@18321000 { > - compatible = "qcom,sc7180-osm-l3"; > + compatible = "qcom,sc7180-osm-l3", "qcom,osm-l3"; > reg = <0 0x18321000 0 0x1400>; > > clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 07334e19be99..ad9c61768016 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -5359,7 +5359,7 @@ > }; > > epss_l3: interconnect@18590000 { > - compatible = "qcom,sc7280-epss-l3"; > + compatible = "qcom,sc7280-epss-l3", "qcom,epss-l3"; > reg = <0 0x18590000 0 0x1000>; > clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; > clock-names = "xo", "alternate"; > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 1a257f672887..9c7d484ce72f 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -5302,7 +5302,7 @@ > }; > > osm_l3: interconnect@17d41000 { > - compatible = "qcom,sdm845-osm-l3"; > + compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3"; > reg = <0 0x17d41000 0 0x1400>; > > clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index 18bf51ce8b13..8409fb5ea532 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -3958,7 +3958,7 @@ > }; > > osm_l3: interconnect@18321000 { > - compatible = "qcom,sm8150-osm-l3"; > + compatible = "qcom,sm8150-osm-l3", "qcom,osm-l3"; > reg = <0 0x18321000 0 0x1400>; > > clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi > index 27b507f3632b..351c232b8dc6 100644 > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi > @@ -4884,7 +4884,7 @@ > }; > > epss_l3: interconnect@18590000 { > - compatible = "qcom,sm8250-epss-l3"; > + compatible = "qcom,sm8250-epss-l3", "qcom,epss-l3"; if we do change sc7280, sm8250 epss compatible in the bindings, you'll no longer need to list the qcom,epss-l3 here. With ^^ done. Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com> > reg = <0 0x18590000 0 0x1000>; > > clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index ea886cf08b4d..f71cf21a8dd8 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3558,7 +3558,7 @@ }; osm_l3: interconnect@18321000 { - compatible = "qcom,sc7180-osm-l3"; + compatible = "qcom,sc7180-osm-l3", "qcom,osm-l3"; reg = <0 0x18321000 0 0x1400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 07334e19be99..ad9c61768016 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -5359,7 +5359,7 @@ }; epss_l3: interconnect@18590000 { - compatible = "qcom,sc7280-epss-l3"; + compatible = "qcom,sc7280-epss-l3", "qcom,epss-l3"; reg = <0 0x18590000 0 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>; clock-names = "xo", "alternate"; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1a257f672887..9c7d484ce72f 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -5302,7 +5302,7 @@ }; osm_l3: interconnect@17d41000 { - compatible = "qcom,sdm845-osm-l3"; + compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3"; reg = <0 0x17d41000 0 0x1400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 18bf51ce8b13..8409fb5ea532 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3958,7 +3958,7 @@ }; osm_l3: interconnect@18321000 { - compatible = "qcom,sm8150-osm-l3"; + compatible = "qcom,sm8150-osm-l3", "qcom,osm-l3"; reg = <0 0x18321000 0 0x1400>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 27b507f3632b..351c232b8dc6 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -4884,7 +4884,7 @@ }; epss_l3: interconnect@18590000 { - compatible = "qcom,sm8250-epss-l3"; + compatible = "qcom,sm8250-epss-l3", "qcom,epss-l3"; reg = <0 0x18590000 0 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;