diff mbox series

dt-bindings: Drop type from 'cpus' property

Message ID 20221111212857.4104308-1-robh@kernel.org (mailing list archive)
State Not Applicable
Headers show
Series dt-bindings: Drop type from 'cpus' property | expand

Commit Message

Rob Herring Nov. 11, 2022, 9:28 p.m. UTC
'cpus' is a common property, and it is now defined in dtschema schemas,
so drop the type references in the tree.

Signed-off-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/interrupt-controller/apple,aic.yaml | 1 -
 Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml     | 3 ---
 Documentation/devicetree/bindings/power/renesas,apmu.yaml   | 6 ++----
 Documentation/devicetree/bindings/thermal/qcom-lmh.yaml     | 2 +-
 4 files changed, 3 insertions(+), 9 deletions(-)

Comments

Bjorn Andersson Nov. 12, 2022, 3:11 a.m. UTC | #1
On Fri, Nov 11, 2022 at 03:28:56PM -0600, Rob Herring wrote:
> 'cpus' is a common property, and it is now defined in dtschema schemas,
> so drop the type references in the tree.
> 
> Signed-off-by: Rob Herring <robh@kernel.org>

Acked-by: Bjorn Andersson <andersson@kernel.org>

> ---
>  .../devicetree/bindings/interrupt-controller/apple,aic.yaml | 1 -
>  Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml     | 3 ---
>  Documentation/devicetree/bindings/power/renesas,apmu.yaml   | 6 ++----
>  Documentation/devicetree/bindings/thermal/qcom-lmh.yaml     | 2 +-
>  4 files changed, 3 insertions(+), 9 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> index e18107eafe7c..698588e9aa86 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> @@ -90,7 +90,6 @@ properties:
>              maximum: 5
>  
>            cpus:
> -            $ref: /schemas/types.yaml#/definitions/phandle-array
>              description:
>                Should be a list of phandles to CPU nodes (as described in
>                Documentation/devicetree/bindings/arm/cpus.yaml).
> diff --git a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
> index c87821be158b..a740378ed592 100644
> --- a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
> +++ b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
> @@ -32,11 +32,8 @@ properties:
>        - description: nCLUSTERPMUIRQ interrupt
>  
>    cpus:
> -    $ref: /schemas/types.yaml#/definitions/phandle-array
>      minItems: 1
>      maxItems: 12
> -    items:
> -      maxItems: 1
>      description: List of phandles for the CPUs connected to this DSU instance.
>  
>  required:
> diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.yaml b/Documentation/devicetree/bindings/power/renesas,apmu.yaml
> index f2cc89e7f4e4..2b4d802ef4b2 100644
> --- a/Documentation/devicetree/bindings/power/renesas,apmu.yaml
> +++ b/Documentation/devicetree/bindings/power/renesas,apmu.yaml
> @@ -34,10 +34,8 @@ properties:
>      maxItems: 1
>  
>    cpus:
> -    $ref: /schemas/types.yaml#/definitions/phandle-array
> -    items:
> -      minItems: 1
> -      maxItems: 4
> +    minItems: 1
> +    maxItems: 4
>      description: |
>        Array of phandles pointing to CPU cores, which should match the order of
>        CPU cores used by the WUPCR and PSTR registers in the Advanced Power
> diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
> index e1587ddf7de3..92762efc2120 100644
> --- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
> +++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
> @@ -37,7 +37,7 @@ properties:
>    cpus:
>      description:
>        phandle of the first cpu in the LMh cluster
> -    $ref: /schemas/types.yaml#/definitions/phandle
> +    maxItems: 1
>  
>    qcom,lmh-temp-arm-millicelsius:
>      description:
> -- 
> 2.35.1
>
Geert Uytterhoeven Nov. 14, 2022, 8:19 a.m. UTC | #2
On Fri, Nov 11, 2022 at 10:29 PM Rob Herring <robh@kernel.org> wrote:
> 'cpus' is a common property, and it is now defined in dtschema schemas,
> so drop the type references in the tree.
>
> Signed-off-by: Rob Herring <robh@kernel.org>

>  Documentation/devicetree/bindings/power/renesas,apmu.yaml   | 6 ++----

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Suzuki K Poulose Nov. 14, 2022, 10:29 a.m. UTC | #3
On 11/11/2022 21:28, Rob Herring wrote:
> 'cpus' is a common property, and it is now defined in dtschema schemas,
> so drop the type references in the tree.
> 
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
>   .../devicetree/bindings/interrupt-controller/apple,aic.yaml | 1 -
>   Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml     | 3 ---
>   Documentation/devicetree/bindings/power/renesas,apmu.yaml   | 6 ++----
>   Documentation/devicetree/bindings/thermal/qcom-lmh.yaml     | 2 +-
>   4 files changed, 3 insertions(+), 9 deletions(-)
> 

...

> diff --git a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
> index c87821be158b..a740378ed592 100644
> --- a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
> +++ b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
> @@ -32,11 +32,8 @@ properties:
>         - description: nCLUSTERPMUIRQ interrupt
>   
>     cpus:
> -    $ref: /schemas/types.yaml#/definitions/phandle-array
>       minItems: 1
>       maxItems: 12
> -    items:
> -      maxItems: 1
>       description: List of phandles for the CPUs connected to this DSU instance.
>   
>   required:

Acked-by: Suzuki K Poulose <suzuki.poulse@arm.com>
Rob Herring Nov. 16, 2022, 8:22 p.m. UTC | #4
On Fri, 11 Nov 2022 15:28:56 -0600, Rob Herring wrote:
> 'cpus' is a common property, and it is now defined in dtschema schemas,
> so drop the type references in the tree.
> 
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
>  .../devicetree/bindings/interrupt-controller/apple,aic.yaml | 1 -
>  Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml     | 3 ---
>  Documentation/devicetree/bindings/power/renesas,apmu.yaml   | 6 ++----
>  Documentation/devicetree/bindings/thermal/qcom-lmh.yaml     | 2 +-
>  4 files changed, 3 insertions(+), 9 deletions(-)
> 

Applied, thanks!
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
index e18107eafe7c..698588e9aa86 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
@@ -90,7 +90,6 @@  properties:
             maximum: 5
 
           cpus:
-            $ref: /schemas/types.yaml#/definitions/phandle-array
             description:
               Should be a list of phandles to CPU nodes (as described in
               Documentation/devicetree/bindings/arm/cpus.yaml).
diff --git a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
index c87821be158b..a740378ed592 100644
--- a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
+++ b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml
@@ -32,11 +32,8 @@  properties:
       - description: nCLUSTERPMUIRQ interrupt
 
   cpus:
-    $ref: /schemas/types.yaml#/definitions/phandle-array
     minItems: 1
     maxItems: 12
-    items:
-      maxItems: 1
     description: List of phandles for the CPUs connected to this DSU instance.
 
 required:
diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.yaml b/Documentation/devicetree/bindings/power/renesas,apmu.yaml
index f2cc89e7f4e4..2b4d802ef4b2 100644
--- a/Documentation/devicetree/bindings/power/renesas,apmu.yaml
+++ b/Documentation/devicetree/bindings/power/renesas,apmu.yaml
@@ -34,10 +34,8 @@  properties:
     maxItems: 1
 
   cpus:
-    $ref: /schemas/types.yaml#/definitions/phandle-array
-    items:
-      minItems: 1
-      maxItems: 4
+    minItems: 1
+    maxItems: 4
     description: |
       Array of phandles pointing to CPU cores, which should match the order of
       CPU cores used by the WUPCR and PSTR registers in the Advanced Power
diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
index e1587ddf7de3..92762efc2120 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml
@@ -37,7 +37,7 @@  properties:
   cpus:
     description:
       phandle of the first cpu in the LMh cluster
-    $ref: /schemas/types.yaml#/definitions/phandle
+    maxItems: 1
 
   qcom,lmh-temp-arm-millicelsius:
     description: