From patchwork Mon Nov 14 10:42:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 13042059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7AA5C4321E for ; Mon, 14 Nov 2022 10:42:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236155AbiKNKmk (ORCPT ); Mon, 14 Nov 2022 05:42:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39096 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235997AbiKNKmi (ORCPT ); Mon, 14 Nov 2022 05:42:38 -0500 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFB561EAF8 for ; Mon, 14 Nov 2022 02:42:37 -0800 (PST) Received: by mail-lj1-x236.google.com with SMTP id a15so12574798ljb.7 for ; Mon, 14 Nov 2022 02:42:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pefehE5o4ZbEpfgRDd+vWut5SWgW8/RYnVz1s2zWHXE=; b=uZuLqwtgmf+J1MWVvHIF9VmWJb6tLA0c/U0YPCM+7e/Uzfzb5lPasX+IC3yfp2iNKh uVtkvGdNj2j7jTGo+dI+dxfd8wpCOJXuSxYnZ8TGMs/oObT6unEB2szR5Zt9iuaXvcKO Y0y6cWkeUbTl/hSMoDgVU+QC+0OLIDR5o0J4I7jHRNgYSDo31yYydomF4DjwHxLmMw7G 5aF0w6g8YhcbliXFeZ/CVEBdt57OAkXRW1tFbBjptCwMr5BQVzKuRjjazaZDFx5zvP/4 74rLHZc6hiVV32ghjXANyOpaqURNX5Mba7WlDr+Zj+ArfBcX5phE+xtssV35aT/JTtnn UUjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pefehE5o4ZbEpfgRDd+vWut5SWgW8/RYnVz1s2zWHXE=; b=NYjB5lECwb3gecLSJMGvFAeHm0Q/AZlVSpcTeY4OhB9Rs5Y74OoKrIdkrQ8z8AzAvo DnjMhWZtPaTttwVBhTQHBVg+UsV8kvHfyFtn1NtG5nWa4SPcvvmDiKxlJ9Lh5EYTu+P4 duMwwO+pT/6YaxPMtVokIhq0pXN9eBM+U7nQdq+fDx3rsSev8WV9/AoduwOjIEtsX0wv MwADcfgbPo8UfvhsNNrY7Zg9P2EczDl+w4dszBagePWQSYhz9VZw9q3xkWe8hWY7qSeB EjqtgPGyTkKZT5IyZvCKBpMZK720UVTXu5sqqpSFAzOZP5mYJlIL+T5eTqWJ8hMMDDJo oWAA== X-Gm-Message-State: ANoB5pnsCMjIvkcNLzRL6+nf97Jo67rgARwj3yRaRhSIFcLjLWDoO+6S KVwOEV1lV17pniw1Ruyp9iCQS44QEdZGpSTs X-Google-Smtp-Source: AA0mqf7/mUQ/mfjgdPLxhttxA/2in9O16AdY2CR6UlT6O2LaPLs3Ls2ZD6tUWXwDycZWnL+CFHmV2A== X-Received: by 2002:a05:651c:104e:b0:26f:bf09:2f57 with SMTP id x14-20020a05651c104e00b0026fbf092f57mr3642094ljm.180.1668422555818; Mon, 14 Nov 2022 02:42:35 -0800 (PST) Received: from localhost.localdomain ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id bs21-20020a05651c195500b0026c4e922fb2sm1946486ljb.48.2022.11.14.02.42.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 14 Nov 2022 02:42:35 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio , Dmitry Baryshkov , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/9] arm64: dts: qcom: pmk8350: Allow specifying arbitrary SID Date: Mon, 14 Nov 2022 11:42:15 +0100 Message-Id: <20221114104222.36329-3-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20221114104222.36329-1-konrad.dybcio@linaro.org> References: <20221114104222.36329-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PMK8350 is shipped on SID6 with some SoCs, for example with SM6375. Add some preprocessor logic to allow changing the SID in cases like this. While I am not in favour of adding #if's into the device tree, this is the least messy way to handle this. If one isn't specified, it will default to 0 (as it has been previously). Suggested-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- Changes since v1: - take a different approach; patch substituted arch/arm64/boot/dts/qcom/pmk8350.dtsi | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi b/arch/arm64/boot/dts/qcom/pmk8350.dtsi index a7ec9d11946d..2730d97ab213 100644 --- a/arch/arm64/boot/dts/qcom/pmk8350.dtsi +++ b/arch/arm64/boot/dts/qcom/pmk8350.dtsi @@ -8,10 +8,15 @@ #include #include +/* (Sadly) this PMIC can be configured to be at different SIDs */ +#ifndef PMK8350_SID + #define PMK8350_SID 0 +#endif + &spmi_bus { - pmk8350: pmic@0 { + pmk8350: pmic@PMK8350_SID { compatible = "qcom,pmk8350", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; + reg = ; #address-cells = <1>; #size-cells = <0>; @@ -21,14 +26,14 @@ pmk8350_pon: pon@1300 { pon_pwrkey: pwrkey { compatible = "qcom,pmk8350-pwrkey"; - interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + interrupts = ; linux,code = ; status = "disabled"; }; pon_resin: resin { compatible = "qcom,pmk8350-resin"; - interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + interrupts = ; status = "disabled"; }; }; @@ -38,14 +43,14 @@ pmk8350_vadc: adc@3100 { reg = <0x3100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; #io-channel-cells = <1>; }; pmk8350_adc_tm: adc-tm@3400 { compatible = "qcom,adc-tm7"; reg = <0x3400>; - interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; #thermal-sensor-cells = <1>; @@ -56,7 +61,7 @@ pmk8350_rtc: rtc@6100 { compatible = "qcom,pmk8350-rtc"; reg = <0x6100>, <0x6200>; reg-names = "rtc", "alarm"; - interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + interrupts = ; status = "disabled"; };