diff mbox series

arm64: dts: qcom: sm8550: add QCrypto nodes

Message ID 20221115-topic-sm8550-upstream-dts-qce-v1-0-fe750dfa90f6@linaro.org (mailing list archive)
State Accepted
Commit 433477c3bf0b7f00334f4157de2a21aa4d8e46a1
Headers show
Series arm64: dts: qcom: sm8550: add QCrypto nodes | expand

Commit Message

Neil Armstrong Nov. 16, 2022, 10:48 a.m. UTC 
Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Depends on:

- QCE new socs support [1]
- SM8550 QCE bindings [2]
- SM8550 base DT [3]

To: Andy Gross <agross@kernel.org>
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konrad.dybcio@somainline.org>
To: Rob Herring <robh+dt@kernel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

[1] https://lore.kernel.org/all/20220920114051.1116441-1-bhupesh.sharma@linaro.org/
[2] https://lore.kernel.org/all/20221114-narmstrong-sm8550-upstream-qce-v1-0-31b489d5690a@linaro.org/
[3] https://lore.kernel.org/all/20221116103146.2556846-1-abel.vesa@linaro.org/
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)


---
base-commit: a237afe452d9079aa024e465642b4cde0a04c7ff
change-id: 20221115-topic-sm8550-upstream-dts-qce-7f4fe79e0375

Best regards,

Comments

Bjorn Andersson Jan. 10, 2023, 6:46 p.m. UTC | #1 
On Wed, 16 Nov 2022 11:48:35 +0100, Neil Armstrong wrote:
> Add the QCE and Crypto BAM DMA nodes.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: sm8550: add QCrypto nodes
      commit: 433477c3bf0b7f00334f4157de2a21aa4d8e46a1

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 07ba709ca35f..a490b705ce5c 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -1372,6 +1372,30 @@  mmss_noc: interconnect@1780000 {
 			qcom,bcm-voters = <&apps_bcm_voter>;
 		};
 
+		cryptobam: dma-controller@1dc4000 {
+			compatible = "qcom,bam-v1.7.0";
+			reg = <0x0 0x01dc4000 0x0 0x28000>;
+			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			qcom,ee = <0>;
+			qcom,controlled-remotely;
+			iommus = <&apps_smmu 0x480 0x0>,
+				 <&apps_smmu 0x481 0x0>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+			interconnect-names = "memory";
+		};
+
+		crypto: crypto@1de0000 {
+			compatible = "qcom,sm8550-qce";
+			reg = <0x0 0x01dfa000 0x0 0x6000>;
+			dmas = <&cryptobam 4>, <&cryptobam 5>;
+			dma-names = "rx", "tx";
+			iommus = <&apps_smmu 0x480 0x0>,
+				 <&apps_smmu 0x481 0x0>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+			interconnect-names = "memory";
+		};
+
 		tcsr_mutex: hwlock@1f40000 {
 			compatible = "qcom,tcsr-mutex";
 			reg = <0x0 0x01f40000 0x0 0x20000>;