| Message ID | 20221118122539.384993-3-brgl@bgdev.pl (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | serial: qcom-geni-serial: implement support for SE DMA | expand |
On 18/11/2022 13:25, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Drop all unused symbols from the driver. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > drivers/tty/serial/qcom_geni_serial.c | 15 --------------- > 1 file changed, 15 deletions(-) > > diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c > index 9f2212e7b5ec..7af5df6833c7 100644 > --- a/drivers/tty/serial/qcom_geni_serial.c > +++ b/drivers/tty/serial/qcom_geni_serial.c > @@ -42,20 +42,11 @@ > #define UART_TX_PAR_EN BIT(0) > #define UART_CTS_MASK BIT(1) > > -/* SE_UART_TX_WORD_LEN */ > -#define TX_WORD_LEN_MSK GENMASK(9, 0) > - > /* SE_UART_TX_STOP_BIT_LEN */ > -#define TX_STOP_BIT_LEN_MSK GENMASK(23, 0) > #define TX_STOP_BIT_LEN_1 0 > -#define TX_STOP_BIT_LEN_1_5 1 > #define TX_STOP_BIT_LEN_2 2 > > -/* SE_UART_TX_TRANS_LEN */ > -#define TX_TRANS_LEN_MSK GENMASK(23, 0) > - > /* SE_UART_RX_TRANS_CFG */ > -#define UART_RX_INS_STATUS_BIT BIT(2) > #define UART_RX_PAR_EN BIT(3) > > /* SE_UART_RX_WORD_LEN */ > @@ -66,12 +57,9 @@ > > /* SE_UART_TX_PARITY_CFG/RX_PARITY_CFG */ > #define PAR_CALC_EN BIT(0) > -#define PAR_MODE_MSK GENMASK(2, 1) > -#define PAR_MODE_SHFT 1 > #define PAR_EVEN 0x00 > #define PAR_ODD 0x01 > #define PAR_SPACE 0x10 > -#define PAR_MARK 0x11 > > /* SE_UART_MANUAL_RFR register fields */ > #define UART_MANUAL_RFR_EN BIT(31) > @@ -80,11 +68,8 @@ > > /* UART M_CMD OP codes */ > #define UART_START_TX 0x1 > -#define UART_START_BREAK 0x4 > -#define UART_STOP_BREAK 0x5 > /* UART S_CMD OP codes */ > #define UART_START_READ 0x1 > -#define UART_PARAM 0x1 > > #define UART_OVERSAMPLING 32 > #define STALE_TIMEOUT 16
diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c index 9f2212e7b5ec..7af5df6833c7 100644 --- a/drivers/tty/serial/qcom_geni_serial.c +++ b/drivers/tty/serial/qcom_geni_serial.c @@ -42,20 +42,11 @@ #define UART_TX_PAR_EN BIT(0) #define UART_CTS_MASK BIT(1) -/* SE_UART_TX_WORD_LEN */ -#define TX_WORD_LEN_MSK GENMASK(9, 0) - /* SE_UART_TX_STOP_BIT_LEN */ -#define TX_STOP_BIT_LEN_MSK GENMASK(23, 0) #define TX_STOP_BIT_LEN_1 0 -#define TX_STOP_BIT_LEN_1_5 1 #define TX_STOP_BIT_LEN_2 2 -/* SE_UART_TX_TRANS_LEN */ -#define TX_TRANS_LEN_MSK GENMASK(23, 0) - /* SE_UART_RX_TRANS_CFG */ -#define UART_RX_INS_STATUS_BIT BIT(2) #define UART_RX_PAR_EN BIT(3) /* SE_UART_RX_WORD_LEN */ @@ -66,12 +57,9 @@ /* SE_UART_TX_PARITY_CFG/RX_PARITY_CFG */ #define PAR_CALC_EN BIT(0) -#define PAR_MODE_MSK GENMASK(2, 1) -#define PAR_MODE_SHFT 1 #define PAR_EVEN 0x00 #define PAR_ODD 0x01 #define PAR_SPACE 0x10 -#define PAR_MARK 0x11 /* SE_UART_MANUAL_RFR register fields */ #define UART_MANUAL_RFR_EN BIT(31) @@ -80,11 +68,8 @@ /* UART M_CMD OP codes */ #define UART_START_TX 0x1 -#define UART_START_BREAK 0x4 -#define UART_STOP_BREAK 0x5 /* UART S_CMD OP codes */ #define UART_START_READ 0x1 -#define UART_PARAM 0x1 #define UART_OVERSAMPLING 32 #define STALE_TIMEOUT 16