| Message ID | 20230110183259.19142-6-ansuelsmth@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Krait Documentation conversion | expand |
On 10/01/2023 20:32, Christian Marangi wrote: > Fix dtbs_check warning now that we have a correct kpss-acc-v1 yaml > schema. I think the commit message is a bit misleading. You are not barely fixing the warnings, you are adding the clocks configuration. Please adjust the commit subject and drop the first sentence of the commit message. With that fixed: Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Add missing clocks, clock-names, clock-output-names and #clock-cells > bindings for each kpss-acc-v1 clock-controller to reflect Documentation > schema. > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > --- > arch/arm/boot/dts/qcom-apq8064.dtsi | 16 ++++++++++++++++ > arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 ++++++++ > arch/arm/boot/dts/qcom-msm8960.dtsi | 8 ++++++++ > 3 files changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi > index 1e68b42acb91..af84f2d350ef 100644 > --- a/arch/arm/boot/dts/qcom-apq8064.dtsi > +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi > @@ -389,21 +389,37 @@ timer@200a000 { > acc0: clock-controller@2088000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x02088000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu0_aux"; > + #clock-cells = <0>; > }; > > acc1: clock-controller@2098000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x02098000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu1_aux"; > + #clock-cells = <0>; > }; > > acc2: clock-controller@20a8000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x020a8000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu2_aux"; > + #clock-cells = <0>; > }; > > acc3: clock-controller@20b8000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x020b8000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu3_aux"; > + #clock-cells = <0>; > }; > > saw0: power-controller@2089000 { > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi > index de87fcaaa836..e796094a7af5 100644 > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi > @@ -580,6 +580,10 @@ l2cc: clock-controller@2011000 { > acc0: clock-controller@2088000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x02088000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu0_aux"; > + #clock-cells = <0>; > }; > > saw0: regulator@2089000 { > @@ -591,6 +595,10 @@ saw0: regulator@2089000 { > acc1: clock-controller@2098000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x02098000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu1_aux"; > + #clock-cells = <0>; > }; > > saw1: regulator@2099000 { > diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi > index 3bd07cac315b..4fd56d85be3f 100644 > --- a/arch/arm/boot/dts/qcom-msm8960.dtsi > +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi > @@ -208,11 +208,19 @@ regulators { > acc0: clock-controller@2088000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x02088000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu0_aux"; > + #clock-cells = <0>; > }; > > acc1: clock-controller@2098000 { > compatible = "qcom,kpss-acc-v1"; > reg = <0x02098000 0x1000>, <0x02008000 0x1000>; > + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > + clock-names = "pll8_vote", "pxo"; > + clock-output-names = "acpu1_aux"; > + #clock-cells = <0>; > }; > > saw0: regulator@2089000 {
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 1e68b42acb91..af84f2d350ef 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -389,21 +389,37 @@ timer@200a000 { acc0: clock-controller@2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu0_aux"; + #clock-cells = <0>; }; acc1: clock-controller@2098000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu1_aux"; + #clock-cells = <0>; }; acc2: clock-controller@20a8000 { compatible = "qcom,kpss-acc-v1"; reg = <0x020a8000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu2_aux"; + #clock-cells = <0>; }; acc3: clock-controller@20b8000 { compatible = "qcom,kpss-acc-v1"; reg = <0x020b8000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu3_aux"; + #clock-cells = <0>; }; saw0: power-controller@2089000 { diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index de87fcaaa836..e796094a7af5 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -580,6 +580,10 @@ l2cc: clock-controller@2011000 { acc0: clock-controller@2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu0_aux"; + #clock-cells = <0>; }; saw0: regulator@2089000 { @@ -591,6 +595,10 @@ saw0: regulator@2089000 { acc1: clock-controller@2098000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu1_aux"; + #clock-cells = <0>; }; saw1: regulator@2099000 { diff --git a/arch/arm/boot/dts/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom-msm8960.dtsi index 3bd07cac315b..4fd56d85be3f 100644 --- a/arch/arm/boot/dts/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom-msm8960.dtsi @@ -208,11 +208,19 @@ regulators { acc0: clock-controller@2088000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02088000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu0_aux"; + #clock-cells = <0>; }; acc1: clock-controller@2098000 { compatible = "qcom,kpss-acc-v1"; reg = <0x02098000 0x1000>, <0x02008000 0x1000>; + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; + clock-names = "pll8_vote", "pxo"; + clock-output-names = "acpu1_aux"; + #clock-cells = <0>; }; saw0: regulator@2089000 {
Fix dtbs_check warning now that we have a correct kpss-acc-v1 yaml schema. Add missing clocks, clock-names, clock-output-names and #clock-cells bindings for each kpss-acc-v1 clock-controller to reflect Documentation schema. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> --- arch/arm/boot/dts/qcom-apq8064.dtsi | 16 ++++++++++++++++ arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 ++++++++ arch/arm/boot/dts/qcom-msm8960.dtsi | 8 ++++++++ 3 files changed, 32 insertions(+)