| Message ID | 20230113164449.906002-1-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 100d9c94ccf15b02742c326cd04f422ab729153b |
| Headers | show |
| Series | [v2,1/9] arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY | expand |
On Fri, 13 Jan 2023 17:44:41 +0100, Robert Marko wrote: > Serdes register space sizes are incorrect, update them to match the > actual sizes from downstream QCA 5.4 kernel. > > Applied to pci/qcom, thanks! [5/9] dt-bindings: PCI: qcom: alphabetically sort compatibles https://git.kernel.org/lpieralisi/pci/c/4bc08cf23aaa [6/9] dt-bindings: PCI: qcom: document IPQ8074 Gen3 port https://git.kernel.org/lpieralisi/pci/c/3271543941d8 [7/9] PCI: qcom: Add support for IPQ8074 Gen3 port https://git.kernel.org/lpieralisi/pci/c/0591d47a0217 Thanks, Lorenzo
On Fri, 13 Jan 2023 17:44:41 +0100, Robert Marko wrote: > Serdes register space sizes are incorrect, update them to match the > actual sizes from downstream QCA 5.4 kernel. > > Applied, thanks! [1/9] arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY commit: 100d9c94ccf15b02742c326cd04f422ab729153b [2/9] arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY commit: 7ba33591b45f9d547a317e42f1c2acd19c925eb6 [3/9] arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges commit: 2055cb7dccea16bafa3adf9c5e3216949512c34a [4/9] arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed commit: b60590314828e3da670bed94129f4ebc02b87548 [8/9] arm64: dts: qcom: ipq8074: fix Gen3 PCIe node commit: 3e83a9c41ab0244a45a4a2800b9adb8de0d15f82 [9/9] arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names commit: 0e8b90c0256cf9c9589e2cee517dedc987a34355 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index 06e2f0157396..31ec24100213 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -277,9 +277,9 @@ pcie_qmp1: phy@8e000 { status = "disabled"; pcie_phy1: phy@8e200 { - reg = <0x8e200 0x16c>, + reg = <0x8e200 0x130>, <0x8e400 0x200>, - <0x8e800 0x4f4>; + <0x8e800 0x1f8>; #phy-cells = <0>; #clock-cells = <0>; clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
Serdes register space sizes are incorrect, update them to match the actual sizes from downstream QCA 5.4 kernel. Fixes: 942bcd33ed45 ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes") Signed-off-by: Robert Marko <robimarko@gmail.com> --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)